scope:

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

The PIN is as shown in the following example:

Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type identifies the circuit function as follows:

Device type Generic number Circuit function 01 54ACTS220 Radiation hardened, clock and wait-state generation circuit, TTL compatible inputs

The device class designator is a single letter identifying the product assurance level as follows:

Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535

The case outlines are as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line X CDFP3-F14 14 Flat pack

The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M.

Supply voltage range (V_DD) .......................................... −0.3 V dc to +7.0 V dc DC input voltage range (V_IN) ........................................ −0.3 V dc to V_DD + 0.3 V dc DC output voltage range (V_OUT) ...................................... −0.3 V dc to V_DD + 0.3 V dc DC input current, any one input I_IN) ................................ ±10 mA Latch-up immunity current (I_LU) ..................................... ±150 mA Storage temperature range (T_STG) .................................... −65°C to +150°C Lead temperature (soldering, 5 seconds) ............................. +300°C Thermal resistance, junction-to-case (ΘJC) ......................... See MIL-STD-1835 Junction temperature (T_J) ........................................... +175°C Maximum package power dissipation (P_D) .............................. 1.0 W

Supply voltage range (V_DD) .......................................... +4.5 V dc to +5.5 V dc Input voltage range (V_IN) ........................................... +0.0 V dc to V_DD Output voltage range (V_OUT) ......................................... +0.0 V dc to V_DD Case operating temperature range (T_C) ............................... −55°C to +125°C Maximum input rise and fall time at V_DD = 4.5 V (t_r, t_f ............. 1 ns/V 4/

Total dose .......................................................... > 1 x 10⁶ Rads (Si) Single event phenomenon (SEP) effective linear energy threshold (LET) No upsets (see 4.4.4.4) .............. > 80 MeV/(mg/cm²) Dose rate upset (20 ns pulse) ....................................... > 1 × 10⁹ Rads (Si)/s Latch-up None ....................................................... Note Dose rate survivability ............................................ > 1 x 10¹² Rads (Si)/s

intended Use: