scope:

This specification covers the detail requirements for monolithic silicon, Advanced Schottky TTL, exclusive OR gates microcircuits. Two product assurance classes and a choice of case outlines and lead finishes are provided and are reflected in the part number.

The part number shall be in accordance with MIL-M-38510, and as specified herein.

The device type shall be as follows:

Device type Circuit 01 Quadruple, two-input exclusive OR gate

The device class shall be the product assurance level as defined in MIL-M-38510.

The case outlines shall be designated as follows:

Letter Case outline (see MIL-M-38510, appendix C) A F-1 (14-lead, ¼" × ¼"), flat package B F-3 (14-lead, 3/16" × ¼"), flat package C D-1 (14-lead, ¼" × ¾"), dual-in-line package D F-2 (14-lead, ¼" × ⅜"), flat package 2 C-2 (20 terminal, .350" × .350"), square chip carrier package X C-2A (20 terminal, .350" × .350"), square chip carrier package

Supply voltage range - - - - - - - - - - - - - −0.5 V dc to +7.0 V dc Input voltage range - - - - - - - - - - - - - −1.2 V dc at −18 mA to +7.0 V dc Storage temperature range - - - - - - - - - - −65°C to +150°C Maximum power dissipation (P_D) 1/ - - - - - - - 154 mW Lead temperature (soldering, 10 seconds) - - - +300°C Thermal resistance, Junction to case (θJC): Cases A, B, C, D, 2, and X - - - - - - - - - (See MIL-M-38510, appendix C) Junction temperature (T_J) 2/- - - - - - - - - - +175°C

Beneficial comments (recommendations, additions, deletions) and any pertinent data which may be of use in improving this document should be addressed to: Rome Air Development Center (RBE-2), Griffiss AFB, NY 13441, by using the self-addressed Standardization Document Improvement Proposal (DD Form 1426) appearing at the end ) of this document or by letter.)

Supply voltage - - - - - - - - - - - - - 4.5 V dc to 5.5 V dc Minimum high level input voltage - - - - 2.0 V dc Maximum low level input voltage - - - - 0.8 V dc Case operating temperature range (T_C)- - −55°C to +125°C