DLA - SMD-5962-92062
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, UV ERASABLE PROGRAMMABLE LOGIC DEVICE, MONOLITHIC SILICON
| Organization: | DLA |
| Publication Date: | 5 August 1993 |
| Status: | inactive |
| Page Count: | 26 |
scope:
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes B, Q, and M and space application (device classes S and V) and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". When available, a choice of radiation hardness assurance (RHA) levels are reflected in the PIN.
The PIN shall be as shown in the following example:
Device classes M, B, and S RHA marked devices shall meet the MIL-M-38510 specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-I-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
The device types shall identify the circuit function as follows:
Device type Generic number 1/ Circuit function Propagation delay time 01 192 Macrocell EPLD 40 ns 02 192 Macrocell EPLD 30 ns
The device class designator shall be a single letter identifying the product assurance level as follows:
Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 B or S Certification and qualification to MIL-I-38510 Q or V Certification and qualification to MIL-I-38535
The case outlines shall be as designated in MIL-STD-1815, and as follows:
Outline letter Descriptive designator Terminals Package style X GQCC1-J84E 84 "J" lead chip carrier 2/ Y CMGA15-P84E 84 Pin grid array 2/ Z CHGA3-P84E 84 Pin grid array 2/
The lead finish shall be as specified in MIL-M-38510 for classes M, B, and S or MIL-I-38535 for classes Q and V. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference.
Supply voltage range (VCC) - - - - - - - - - - - −2.0 V dc to +7.0 V dc DC input voltage range - - - - - - - - - - - - - −2.0 V dc to +7.0 V dc 4/ Maximum power dissipation - - - - - - - - - - - 2.5 W 5/ Lead temperature (soldering, 10 seconds) - - - - +260°C Thermal resistance, junction-to-case (θJC): Case outlines X, Y, and Z - - - - - - - - - - See MIL-STD-1835 Junction temperature (TJ) - - - - - - - - - - - +175°C Storage temperature range - - - - - - - - - - - −65°C to +150°C Temperature under bias range - - - - - - - - - - −55°C to +125°C Endurance - - - - - - - - - - - - - - - - - - - 25 erase/write cycles (minimum) Data retention - - - - - - - - - - - - - - - - - 10 years (minimum)
Supply voltage range (VCC) - - - - - - - - - - - +4.5 V dc to +5.5 V dc Ground voltage (GND) - - - - - - - - - - - - - - 0 V dc Input high voltage (VIH) - - - - - - - - - - - - 2.2 V dc minimum Input low voltage (VIL) - - - - - - - - - - - - 0.8 V dc maximum Case operating temperature range (TC) - - - - - −55°C to +125°C 6/ Input rise time (tR) - - - - - - - - - - - - - - 100 ns maximum Input fall time (tF) - - - - - - - - - - - - - - 100 ns maximum
Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) - - - - - - - 7/ percent
intended Use:
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
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