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DLA - SMD-5962-95767

MICROCIRCUIT, DIGITAL, RADIATION HARDENED, HIGH SPEED CMOS, DUAL 2-BIT BISTABLE TRANSPARENT LATCH, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON

inactive
Organization: DLA
Publication Date: 24 November 1995
Status: inactive
Page Count: 18
scope:

This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes Q and M) and space application (device class V), and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". When available, a choice of Radiation Hardness Assurance (RNA) levels are reflected in the PIN.

The PIN shall be as shown in the following example:

Device class M RHA marked devices shall meet the MIL-I-38535 appendix A specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-I-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type(s) shall identify the circuit function as follows:

Device type Generic number Circuit function 01 HCTS75 Radiation hardened, SOS, high speed CMOS, dual 2-bit bistable transparent latch, TTL compatible inputs

The device class designator shall be a single letter identifying the product assurance level as follows:

Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 Q or V Certification and qualification to MIL-I-38535

The case outline(s) shall be as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style E CDIP2-T16 16 Dual-in-line X CDFP4-F16 16 Flat pack

The lead finish shall be as specified in MIL-STD-883 (see 3.1 herein) for class M or MIL-I-38535 for classes Q and V. Finish letter "XI" shall not be marked on the microcircuit or its packaging. The "XI" designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference.

Supply voltage range (VCC) . . . . . . . . . . . . . . . . . . . . −0.5 V dc to +7.0 V dc DC input voltage range (VIN) . . . . . . . . . . . . . . . . . . . . −0.5 V dc to VCC + 0.5 V dc DC output voltage range (VOUT) . . . . . . . . . . . . . . . . . . . −0.5 V dc to VCC + 0.5 V dc DC input current, any one input (IIN) . . . . . . . . . . . . . . . ±10 mA DC drain current, any one output (IOUT) . . . . . . . . . . . . . . ±25 mA Storage temperature range (TSTG) . . . . . . . . . . . . . . . . . . −65°C to +150°C Lead temperature (soldering, 10 seconds) . . . . . . . . . . . . . . +265°C Thermal resistance, junction-to-case (ΘJC): Case outline E . . . . . . . . . . . . . . . . . . . . . . . . . 24°C/W Case outline X . . . . . . . . . . . . . . . . . . . . . . . . . 29°C/W Thermal resistance, junction-to-ambient (ΘJA): Case outline E . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W Case outline X . . . . . . . . . . . . . . . . . . . . . . . . . 114°C/W Junction temperature (TJ) . . . . . . . . . . . . . . . . . . . . . +175°C Maximum package power dissipation at TA = +125°C (PD): 4/ Case outline E . . . . . . . . . . . . . . . . . . . . . . . . . 0.68 W Case outline X . . . . . . . . . . . . . . . . . . . . . . . . . 0.44 W

Supply voltage range (VCC) . . . . . . . . . . . . . . . . . . . . . +4.5 V dc to +5.5 V dc Input voltage range (VIN) . . . . . . . . . . . . . . . . . . . . . +0.0 V dc to VCC Output voltage range (VOUT) . . . . . . . . . . . . . . . . . . . . +0.0 V dc to VCC Maximum low level input voltage (VIL) . . . . . . . . . . . . . . . 0.8 V Minimum high level input voltage (VIH) . . . . . . . . . . . . . . . VCC/2 Case operating temperature range (TC) . . . . . . . . . . . . . . . −55°C to +125°C Maximum input rise and fall time at VCC = 4.5 V (tr, tf) . . . . . . 500 ns Radiation features: Total dose . . . . . . . . . . . . . . . . . . . . . . . . . . . > 2 × 105 Rads (Si) Single event phenomenon (SEP) effective Linear energy threshold (LET) no upsets (see 4.4.4.4) . . . . . > 100 MeV/(cm2/mg) 5/ Dose rate upset (20 ns pulse) . . . . . . . . . . . . . . . . . . > 1 × 1010 Rads (Si)/s 5/ Latch-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . None 5/ Dose rate survivability . . . . . . . . . . . . . . . . . . . . . > 1 × 1012 Rads (Si)/s 5/

intended Use:

Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.

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Document History

January 28, 1998
MICROCIRCUIT, DIGITAL, RADIATION HARDENED, HIGH SPEED CMOS, DUAL 2-BIT BISTABLE TRANSPARENT LATCH, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON
Microcircuit die conforming to this drawing are intended for use in microcircuits built in accordance with MIL-PRF-38535 or MIL-PRF-38534 for government microcircuit applications (original...
SMD-5962-95767
November 24, 1995
MICROCIRCUIT, DIGITAL, RADIATION HARDENED, HIGH SPEED CMOS, DUAL 2-BIT BISTABLE TRANSPARENT LATCH, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes Q and M) and...

References

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