DLA - DESC-DWG-87072 REV B
RESISTOR NETWORK, FIXED, FILM, TEN PIN SIP, MULTIPLE RESISTANCE VALUES, MULTIPLE SCHEMATICS AND MULTIPLE TOLERANCES
inactive
| Organization: | DLA |
| Publication Date: | 28 May 1993 |
| Status: | inactive |
| Page Count: | 17 |
scope:
This drawing describes the requirements for a 10 pin single-in-line package (SIP) resistor network.
The complete PIN shall be as shown in the following example:
intended Use:
Resistor networks described herein are intended for use in electronic circuits where miniaturization is required.
Document History
June 6, 2016
RESISTOR NETWORK, FIXED, FILM, 10-PIN SIP, MULTIPLE RESISTANCE VALUES, MULTIPLE SCHEMATICS AND MULTIPLE TOLERANCES
This drawing describes the requirements for a 10-pin, single-in-line package (SIP), fixed, film, resistor network.
January 29, 2007
RESISTOR NETWORK, FIXED, FILM, 10-PIN SIP, MULTIPLE RESISTANCE VALUES, MULTIPLE SCHEMATICS AND MULTIPLE TOLERANCES
This drawing describes the requirements for a 10-pin, single-in-line package (SIP), fixed, film, resistor network.
September 11, 2000
RESISTOR NETWORK, FIXED, FILM, TEN PIN SIP, MULTIPLE RESISTANCE VALUES, MULTIPLE SCHEMATICS AND MULTIPLE TOLERANCES
This drawing describes the requirements for a ten pin, single-in-line package (SIP), fixed, film, resistor network.
DESC-DWG-87072 REV B
May 28, 1993
RESISTOR NETWORK, FIXED, FILM, TEN PIN SIP, MULTIPLE RESISTANCE VALUES, MULTIPLE SCHEMATICS AND MULTIPLE TOLERANCES
This drawing describes the requirements for a 10 pin single-in-line package (SIP) resistor network.
The complete PIN shall be as shown in the following example:
May 4, 1992
RESISTOR NETWORK, FIXED, FILM, TEN PIN SIP, MULTIPLE RESISTANCE VALUES, MULTIPLE SCHEMATICS AND MULTIPLE TOLERANCES
A description is not available for this item.
December 29, 1987
RESISTOR NETWORK, FIXED, FILM, TEN PIN SIP, MULTIPLE RESISTANCE VALUES, MULTIPLE SCHEMATICS AND MULTIPLE TOLERANCES
A description is not available for this item.