DLA - DESC-DWG-87072
RESISTOR NETWORK, FIXED, FILM, TEN PIN SIP, MULTIPLE RESISTANCE VALUES, MULTIPLE SCHEMATICS AND MULTIPLE TOLERANCES
inactive
| Organization: | DLA |
| Publication Date: | 29 December 1987 |
| Status: | inactive |
| Page Count: | 16 |
Document History
June 6, 2016
RESISTOR NETWORK, FIXED, FILM, 10-PIN SIP, MULTIPLE RESISTANCE VALUES, MULTIPLE SCHEMATICS AND MULTIPLE TOLERANCES
This drawing describes the requirements for a 10-pin, single-in-line package (SIP), fixed, film, resistor network.
January 29, 2007
RESISTOR NETWORK, FIXED, FILM, 10-PIN SIP, MULTIPLE RESISTANCE VALUES, MULTIPLE SCHEMATICS AND MULTIPLE TOLERANCES
This drawing describes the requirements for a 10-pin, single-in-line package (SIP), fixed, film, resistor network.
September 11, 2000
RESISTOR NETWORK, FIXED, FILM, TEN PIN SIP, MULTIPLE RESISTANCE VALUES, MULTIPLE SCHEMATICS AND MULTIPLE TOLERANCES
This drawing describes the requirements for a ten pin, single-in-line package (SIP), fixed, film, resistor network.
May 28, 1993
RESISTOR NETWORK, FIXED, FILM, TEN PIN SIP, MULTIPLE RESISTANCE VALUES, MULTIPLE SCHEMATICS AND MULTIPLE TOLERANCES
This drawing describes the requirements for a 10 pin single-in-line package (SIP) resistor network.
The complete PIN shall be as shown in the following example:
May 4, 1992
RESISTOR NETWORK, FIXED, FILM, TEN PIN SIP, MULTIPLE RESISTANCE VALUES, MULTIPLE SCHEMATICS AND MULTIPLE TOLERANCES
A description is not available for this item.
DESC-DWG-87072
December 29, 1987
RESISTOR NETWORK, FIXED, FILM, TEN PIN SIP, MULTIPLE RESISTANCE VALUES, MULTIPLE SCHEMATICS AND MULTIPLE TOLERANCES
A description is not available for this item.