DLA - SMD-5962-88588 REV A
MICROCIRCUIT, MEMORY, DIGITAL, 1024 X 4 CMOS STATIC RAM WITH RESET, MONOLITHIC SILICON
| Organization: | DLA |
| Publication Date: | 30 December 1996 |
| Status: | inactive |
| Page Count: | 15 |
scope:
This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A.
The complete PIN is as shown in the following example:
The device type(s) identify the circuit function as follows:
Device type Generic number Circuit function Access time 01 See 6.6 1024 × 4 CMOS static RAM 35 ns 02 See 6.6 1024 × 4 CMOS static RAM 25 ns 03 See 6.6 1024 × 4 CMOS static RAM 15 ns 04 See 6.6 1024 × 4 CMOS static RAM 35 ns 05 See 6.6 1024 × 4 CMOS static RAM 25 ns 06 See 6.6 1024 × 4 CMOS static RAM 15 ns
The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter Descriptive designator Terminals Package style K GDFP2-F24 or CDFP3-F24 24 Flat pack L GDIP3-T24 or CDIP4-T24 24 Dual-in-line X CQCC4-N28 28 Rectangular leadless chip carrier
The lead finish is as specified in MIL-PRF-38535, appendix A.
Supply voltage to ground potential ....................
Supply voltage range (VCC) ....................
intended Use:
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
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