DLA - SMD-5962-89468 REV B
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, UV ERASEABLE PROGRAMMABLE LOGIC DEVICE, MONOLITHIC SILICON
| Organization: | DLA |
| Publication Date: | 26 February 1997 |
| Status: | inactive |
| Page Count: | 22 |
scope:
This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A.
Part or Identifying Number (PIN). The complete PIN is as shown in the following example:
The device type(s) shall identify the circuit function as follows:
Device type Generic number 1/ Circuit function Propagation Delay 01 128-Macrocell EPLD 35 ns 02 128-Macrocell EPLD 30 ns 03 128-Macrocell EPLD 25 ns 04 128-Macrocell EPLD 20 ns 05 128-Macrocell EPLD 15 ns
The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter Descriptive designator Terminals Package style X CMGA15-PN 68 pin grid array package 2/ Y GQCC1-J68 68 J-leaded chip carrier 2/ Z See figure 1 68 quad flat package 2/
The lead finish is as specified in MIL-PRF-38535, appendix A.
Supply voltage to ground potential 2.0 V dc to +7.0 V dc DC Input voltage 2.0 V dc to +7.0 V dc Maximum power dissipation 3/ 2.5 W Lead temperature (soldering, 10 seconds) +260°C Thermal resistance, junction-to-case (θJC): Case outlines X and Y See MIL-STD-1835 Case outline Z 10°C/W 4/ Junction temperature (Tj) +175°C Storage temperature range −65°C to +150°C Temperature under bias −55°C to +125°C Endurance 25 erase/write cycles (minimum) Data retention 10 years minimum
Supply voltage (VCC) --------------------
intended Use:
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
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