NPFC - MIL-M-38510/350
MICROCIRCUITS, DIGITAL, BIPOLAR, ADVANCED SCHOTTKY TTL, QUAD 2-PORT REGISTERS, CASCADABLE, MONOLITHIC SILICON
| Organization: | NPFC |
| Publication Date: | 24 June 1985 |
| Status: | inactive |
| Page Count: | 22 |
scope:
This specification covers the detail requirements for monolithic silicon, Advanced Schottky TTL, Quad 2-Port register microcircuits. Two product assurance classes and a choice of case outlines and lead finishes are provided for each type and are reflected in the complete part number.
The part number shall be in accordance with MIL-M-38510, and as specified herein.
The device type shall be as follows:
Device type Circuit 01 Quad 2-Port cascadable register with both inverted and non-inverted outputs 02 Quad 2-Port cascadable register with non-inverted outputs
The device class shall be the product assurance level as defined in MIL-M-38510.
The case outline shall be designated as follows:
Outline letter Case outline (See MIL-M-38510, appendix C) R D-8 (20-lead, ¼" × 1 1/16"), dual in-line package S F-9 (20-lead, ¼" × ½"), flat package E D-2 (16-lead, ¼" × ⅞"), dual-in-line package F F-5 (16-lead, ¼" × ⅜"), flat package 2 C-2 (20-terminal, .350" × .350"), square chip carrier package
Supply voltage range - - - - - - - - - - - −0.5 V dc to +7.0 V dc Input voltage range- - - - - - - - - - - - −1.2 V dc at −18 mA to +7.0 V dc Storage temperature range- - - - - - - - - −65°C to +150°C Maximum power dissipation (PD) 1/ - - - - - Device type 01 - - - - - - - - - - - - - 209 mW Device type 02 - - - - - - - - - - - - - 187 mW Lead temperature (soldering, 10 seconds) - +300°C Thermal resistance, junction-to-case (θJC): 2/ Case R - - - - - - - - - - - - - - - - - (See MIL-M-38510, appendix C) Case S - - - - - - - - - - - - - - - - -
Beneficial comments (recommendations, additions, deletions) and any pertinent data which may be of use in improving this document should be addressed to: Rome Air Development Center (RBE-2), Griffiss AFB, NY 13441, by using the self-addressed Standardization Document Improvement Proposal (DD Form 1426) appearing at the end of this document or by letter.
Case E- - - - - - - - - - - - - - - - - (See MIL-M-38510, appendix C) Case F- - - - - - - - - - - - - - - - - Case 2- - - - - - - - - - - - - - - - - 0.08°C/W Junction temperature (TJ) - - - - - - - - +175°C 3/
Supply voltage (VCC)- - - - - - - - - - - - - - 4.5 V dc minimum to 5.5 V dc maximum Minimum high-level input voltage (VIH)- - - - - 2.0 V dc Maximum low-level input voltage (VIL) - - - - - 0.8 V dc Normalized fanout (each output) 4/ Low logic level - - - - - - - - - - - - - - - - 33 maximum High logic level- - - - - - - - - - - - - - - - 50 maximum Case operating temperature range (TC) - - - - - −55°C to +125°C Width of clock pulse high: Device type 01, 02- - - - - - - - - - - - - - 4.0 ns minimum Width of clock pulse low: Device type 01, 02- - - - - - - - - - - - - - 7.0 ns minimum Setup time in high to clock pulse: Device type 01, 02- - - - - - - - - - - - - - 4.5 ns minimum Setup time in low to clock pulse: Device type 01, 02- - - - - - - - - - - - - - 4.5 ns minimum Setup time S high to clock pulse: Device type 01- - - - - - - - - - - - - - - - 10.5 minimum Device type 02- - - - - - - - - - - - - - - - 9.5 minimum Setup time S low to clock pulse: Device type 01- - - - - - - - - - - - - - - - 10.5 minimum Device type 02- - - - - - - - - - - - - - - - 9.5 minimum Hold time in high to clock pulse: Device type 01, 02- - - - - - - - - - - - - - 1.5 ns minimum Hold time in low to clock pulse: Device type 01, 02- - - - - - - - - - - - - - 1.5 ns minimum Hold time S high to clock pulse: Device type 01, 02- - - - - - - - - - - - - - 0 ns minimum Hold time S low to clock pulse: Device type 01, 02- - - - - - - - - - - - - - 0 ns minimum
intended Use:
Microcircuits conforming to this specification are intended for original equipment design applications and logistic support of existing equipment.
Document History