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DLA - SMD-5962-91536

MICROCIRCUIT, DIGITAL, ECL, TRIPLE D FLIP-FLOP, MONOLITHIC SILICON

inactive
Organization: DLA
Publication Date: 26 January 1993
Status: inactive
Page Count: 15
scope:

This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes B, Q, and M) and space application (device classes S and V), and a choice of case outlines and lead finishes are available and are reflected in the Part or identifying Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

The PIN shall be as shown in the following example:

Device classes M, B, and S RHA marked devices shall meet the MIL-M-38510 specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-I-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type(s) shall identify the circuit function as follows:

Device type Generic number Circuit function 01 100331 Triple D flip-flop

The device class designator shall be a single letter identifying the product assurance level as follows:

Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 B or S Certification and qualification to MIL-M-38510 Q or V Certification and qualification to MIL-I-38535

The case outline(s) shall be as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style X GDIP5-T24 or CDIP6-T24 24 dual-in-line Y See figure 1 24 quad flat pack

The lead finish shall be as specified in MIL-M-38510 for classes M, B, and S or MIL-I-38535 for classes Q and V. Finish Letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference.

Negative supply voltage range (VEE) - - - - - - - - - - - - - −7.0 V dc to +0.5 V dc DC input voltage range (VIN) - - - - - - - - - - - - - - - - - VEE to +0.5 V DC input current range (IIN) - - - - - - - - - - - - - - - - - −30 mA to +5.0 mA Maximum dc output current (IOUT) - - - - - - - - - - - - - - - −50 mA Storage temperature range - - - - - - - - - - - - - - - - - - −65°C to +150°C Lead temperature (soldering, 10 seconds) - - - - - - - - - - - +300°C Junction temperature (TJ) - - - - - - - - - - - - - - - - - - +175°C Maximum power dissipation (PD) - - - - - - - - - - - - - - - - 805 mW Thermal resistance, junction-to-case (ΘJC): Case X - - - - - - - - - - - - - - - - - - - - - - - - - - - See MIL-STD-1835 Case Y - - - - - - - - - - - - - - - - - - - - - - - - - - - 28°C/W

Negative supply voltage range (VEE) - - - - - - - - - - - - - −5.7 V dc minimum to −4.2 V dc maximum High level input voltage range (VIH) - - - - - - - - - - - - - −1.165 V dc minimum to −0.870 V dc maximum Low level input voltage range (VIL) - - - - - - - - - - - - - −1.830 V dc minimum to −1.475 V dc maximum Case operating temperature range (TC) - - - - - - - - - - - - −55°C to +125°C Minimum setup time, Dn to CPC/CPn (ts) TC = +25°C - - - - - - - - - - - - - - - - - - - - - - - - - 0.8 ns TC = +125°C - - - - - - - - - - - - - - - - - - - - - - - - 1.6 ns TC = −55°C - - - - - - - - - - - - - - - - - - - - - - - - - 1.5 ns Minimum setup time, Dn to CPC/CPn (th) TC = +25°C - - - - - - - - - - - - - - - - - - - - - - - - - 1.3 ns TC = +125°C - - - - - - - - - - - - - - - - - - - - - - - - 1.6 ns TC = −55°C - - - - - - - - - - - - - - - - - - - - - - - - - 1.5 ns Minimum setup time, CDn/SDn to CPc/CPn (ts) TC = +25°C - - - - - - - - - - - - - - - - - - - - - - - - - 1.3 ns TC = +125°C - - - - - - - - - - - - - - - - - - - - - - - - 1.6 ns TC = −55°C - - - - - - - - - - - - - - - - - - - - - - - - - 1.5 ns Minimum setup time, MR/MS to CPC/CPn (ts) TC = +25°C - - - - - - - - - - - - - - - - - - - - - - - - - 2.3 ns TC = +125°C - - - - - - - - - - - - - - - - - - - - - - - - 2.5 ns TC = −55°C - - - - - - - - - - - - - - - - - - - - - - - - - 2.5 ns Minimum pulse width, high, CPC/CPn/CDn/SDn/MS/MR (tw(H)) - - - 2.0 ns Maximum toggle frequency (fMAX) - - - - - - - - - - - - - - - 400 MHz

Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) - - - - - - - - XX percent 2/

intended Use:

Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.

Microcircuits... View More

Document History

February 8, 2019
MICROCIRCUIT, DIGITAL, ECL, TRIPLE D FLIP-FLOP MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device class Q and M) and space application (device class V). A choice of case outlines and lead finishes are...
October 11, 2012
MICROCIRCUIT, DIGITAL, ECL, TRIPLE D FLIP-FLOP MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...
January 29, 2004
MICROCIRCUIT, DIGITAL, ECL, TRIPLE D FLIP-FLOP, MONOLITHIC SILICON
A description is not available for this item.
SMD-5962-91536
January 26, 1993
MICROCIRCUIT, DIGITAL, ECL, TRIPLE D FLIP-FLOP, MONOLITHIC SILICON
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes B, Q, and M) and...

References

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