NPFC - MIL-M-38510/301
MICROCIRCUITS, DIGITAL, BIPOLAR LOW-POWER SCHOTTKY TTL, FLIP-FLOPS, CASCADABLE, MONOLITHIC SILICON
| Organization: | NPFC |
| Publication Date: | 8 April 1988 |
| Status: | inactive |
| Page Count: | 69 |
scope:
This specification covers the detail requirements for monolithic silicon, low-power Schottky TTL, flip-flops, bistable logic microcircuits. Two product assurance classes and a choice of case outline and lead finish are provided for each type and are reflected in the complete part number.
The part number shall be in accordance with MIL-M-38510.
The device types shall be as follows:
Device type Circuit 01 Dual J-K flip-flop with clear 02 Dual D type flip-flop with clear and preset 03 Duel J-K flip-flop with clear and preset 04 Dual J-K flip-flop with preset 05 Dual J-K flip-flop with preset and common clear and common clock 06 Hex D type flip-flop with common clear and common clock 07 Quad D type flip-flop with common clear and common clock 08 Dual J-K flip-flop with clear 09 Dual J-K flip-flop with clear and preset 10 Dual J-K flip-flop with clear and preset
The device class shall be the product assurance level as defined in MIL-M-38510.
The case outlines shall be designated as follows:
Letter Case outline (see MIL-M-38510, appendix C) A F-1 (14-lead, .280" × .260" × .085"), flat package B F-3 (14-lead, .280" × .200" × .070"), flat package C D-1 (14-lead, .785" × .310" × .200"), dual-in-line package D F-2 (14-lead, .390" × .260" × .085"), flat package E D-2 (16-lead, .840" × .310" × .200"), dual-in-line package F F-5 (16-lead, .440" × .285" × .085"), flat package 2 C-2 (20-terminal, .358" × .358" .100"), square chip carrier package X C-2A (20-terminal, .358" × .358" .075"), square chip carrier package
Beneficial comments (recommendations, additions, deletions) and any pertinent data which may be of use in improving this document should be addressed to: Rome Air Development Center (RBE-2), Griffiss AFB, NY 13441, by using the self-addressed Standardization Document Improvement Proposal (DD Form 1426) appearing at the end of this document or by letter.
Supply voltage range- - - - - - - - - - - - −0.5 V dc to 7.0 V dc Input voltage range - - - - - - - - - - - - −1.5 V dc at −18 mA to 5.5 V dc Storage temperature range - - - - - - - - - −65°C to +150°C Maximum power dissipation per flip-flop, (PD) 1/ - - - - - - - - - - - 25 mW Lead temperature (soldering, 10 seconds)- - 300°C Thermal resistance, junction to case (θJC): Cases A, B, C, D, E, 2, and X - - - - - - (See MIL-M-38510, appendix C) Junction temperature (TJ) 2/- - - - - - - - +175°C
Supply voltage range (VCC)- - - - - - - - - - 4.5 V dc minimum to 5.5 V dc maximum Minimum high level input voltage (VIH)- - - - 2.0 V dc Maximum low level input voltage (VIL) - - - - 0.7 V dc Case operating temperature range (TC) - - - - −55°C to +125°C Input set up time: Device types: 01, 03, 04, 05, 08, 09, and 10 - - - - - 25 ns minimum 02, 06, and 07 - - - - - - - - - - - - - 20 ns minimum Input hold time: Device types: 01, 03, 04, 05, 08, and 10- - - - - - - - - 0 ns minimum 02, 06, 07, and 09- - - - - - - - - - - - - 5 ns minimum
intended Use:
Microcircuits conforming to this specification are intended for original equipment design applications and logistic support of existing equipment.
Document History
