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DLA - SMD-5962-85155 REV E

MICROCIRCUIT, MEMORY, BIPOLAR, PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON

inactive
Organization: DLA
Publication Date: 13 June 1996
Status: inactive
Page Count: 23
scope:

This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A.

The complete PIN shall be as shown in the following example:

The device type(s) shall identify the circuit function as follows:

Device type Generic number Circuit function 01 PAL16L8-20 16-input 8-output AND-OR invert gate array 02 PAL16R8-20 16-input 8-output registered AND-OR gate array 03 PAL16R6-20 16-input 6-output registered AND-OR gate array 04 PAL16R4-20 16-input 4-output registered AND-OR gate array 05 PAL16L8-30 16-input 8-output AND-OR invert gate array 06 PAL16R8-30 16-input 8-output registered AND-OR gate array 07 PAL16R6-30 16-input 6-output registered AND-OR gate array 08 PAL16R4-30 16-input 4-output registered AND-OR gate array 09 PAL16LB-15 16-input 8-output AND-OR invert gate array 10 PAL16R8-15 16-input 8-output registered AND-OR gate array 11 PAL16R6-15 16-input 6-output registered AND-OR gate array 12 PAL16R4-15 16-input 4-output registered AND-OR gate array 13 PAL16L8A-12 16-input B-output AND-OR invert gate array 14 PAL16R8A-12 16-input B-output registered AND-OR gate array 15 PAL16R6-12 16-input 6-output registered AND-OR gate array 16 PAL16R4-12 16-input 4-output registered AND-OR gate array 17 PAL16L8-10 16-input 8-output AND-OR invert gate array 18 PAL16R8-10 16-input 8-output registered AND-OR gate array 19 PAL16R6-10 16-input 6-output registered AND-OR gate array 20 PAL16R4-10 16-input 4-output registered AND-OD gate array 21 PAL16R8-7 16-input 8-output registered AND-OR gate array 22 PAL16R4-7 16-input 4-output registered AND-OD gate array

The case outline(s) are as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style R GDIP1-T20 20-lead dual-in-line package CDIP1-T20 20-lead dual-in-line package S CDFP5-F20 1/ 20-lead flat package 2 CQCC1-N20 20-terminal square chip carrier package

The lead finish is as specified in MIL-PRF-38535, appendix A.

Supply voltage range 2/-------------------- −0.5 V dc to 7.0 V dc Input voltage range 2/3/------------------- −0.5 V dc to 5.5 V dc Storage temperature range ------------------- −65°C to +150°C Lead temperature (soldering, 10 seconds)--------- +260°C Thermal resistance, junction-to-case (ΘJC)4/ ---- See MIL-STD-1835 Applied voltage to a disabled output range 2/3/-- −0.5 V dc to 5.5 V dc Maximum power dissipation (PD)5/: Device types 01, 02, 03, and 04 -------------- 1.1 W Device types 05, 06, 07, and 08 -------------- 0.6 W Device types 09, 10, 11, 12, 13, 14, and 15 thru 20- 1.2 W Maximum junction temperature (TJ) --------------- +175°C

Supply voltage range (VCC)------------------ 4.5 V dc minimum to 5.5 V dc maximum Minimum high level input voltage (VIH)-------- 2.0 V dc Maximum low level input voltage (VIL) -------- 0.8 V dc Maximum high level output current (IOH) ------- −2.0 mA dc Maximum low level output current (IOL)-------- 12.0 mA dc Case operating temperature range------------- −55°C to +125°C

intended Use:

Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.

Document History

March 27, 2020
MICROCIRCUIT, MEMORY, BIPOLAR, PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON
Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A.
March 19, 2015
MICROCIRCUIT, MEMORY, BIPOLAR, PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
August 18, 2006
MICROCIRCUIT, MEMORY, BIPOLAR, PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.  
January 11, 2001
MICROCIRCUIT, MEMORY, BIPOLAR, PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON
A description is not available for this item.
SMD-5962-85155 REV E
June 13, 1996
MICROCIRCUIT, MEMORY, BIPOLAR, PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON
This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. The complete PIN shall be as shown in the...
December 4, 1990
MICROCIRCUIT, MEMORY, BIPOLAR, PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON
This drawing describes device requirements for class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices"....
September 11, 1989
MICROCIRCUIT, MEMORY, BIPOLAR, PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON
A description is not available for this item.
September 1, 1988
MICROCIRCUIT, MEMORY, BIPOLAR, PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON
A description is not available for this item.
July 16, 1987
MICROCIRCUIT, MEMORY, BIPOLAR, PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON
A description is not available for this item.
June 20, 1986
MICROCIRCUIT, MEMORY, BIPOLAR, PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON
A description is not available for this item.
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