scope:

This specification covers the detail requirements for monolithic silicon, Schottky TTL, static, 1024 bit random access memory microcircuits. Three product assurance classes and a choice of case outline/lead finish are provided for each type and are reflected in the complete part number.

The part number shall be in accordance with MIL-M-38510, and as specified herein.

The device type shall be as follows:

Device type Circuit Access time 01 1024X1 bit RAM, uncommitted 60 ns (t_WHAC = 5 ns, collector t_AVWL = 15 ns) 02 1024X1 bit RAM, three-state 60 ns (t_WHAC = 5 ns, output t_AVWL = 15 ns) 03 1024X1 bit lower power RAM, 70 ns uncommitted collector 04 1024X1 bit lower power RAM, 70 ns three-state output 05 1024X1 bit RAM, uncommitted 60 ns (t_WHAC = 10 ns, collector t_AVWL = 10 ns) 06 1024X1 bit RAM, three-state 60 ns (t_WHAC = 10 ns, output t_AVWL = 10 ns) 07 1024X1 bit Schottky RAM, 45 ns uncommitted collector 08 1024X1 bit Schottky RAM, 45 ns three-state output 09 256X4 bit RAM, uncommitted 60 ns collector 10 2564 bit RAM, three-state 60 ns output 11 256X4 bit low power RAM, 75 ns uncommitted collector 12 256X4 bit low power RAM, 75 ns three-state output 13 1024X1 bit low power RAM, 50 ns three-state output 14 256X4 bit RAM, three-state 45 ns output 15 256X4 bit low power RAM, 55 ns three-state output

The device class shall be the product assurance level as defined in MIL-M-38510. Beneficial comments (recommendations, additions, deletions) and any pertinent data which may be of use in improving this document should be addressed to: Rome Air Development Center (RBE-2), Griffiss AFB, NY 13441, by using the self-addressed Standardization Document Improvement Proposal (DD Form 5426) appearing at the end of this document or by letter.

The case outline shall be designated as follows:

Letter Case outline (see MIL-M-38510, appendix C) E D-2 (16-lead, ¼" × ⅞"), dual-in-line package F F-5 (16-lead, ¼" × ⅜"), flat package W D-7 (22-lead, ⅜" × 1 ⅛"), dual-in-line package X See figure 1 (24-lead, ⅜" × ⅜"), flat package Y C-3 (24 terminal, .400" × .400"), sq. chip carrier

Supply voltage range - - - - - - - - - - - - - - - −0.5 V to +7.10 V Input voltage range - - - - - - - - - - - - - - - −0.5 V to +5.5 V Storage temperature - - - - - - - - - - - - - - - −65° tb +165°C Maximum power dissipation (P_D) 1/: Device types 01, 02, 05, 06, 07,08, 09, 10, 14 - 935 mW Device types 03,04,13 - - - - - - - - - - - - - 413 mW Device types 11, 12, 15 - - - - - - - - - - - - 495 mW Voltage applied to outputs (output high) - - - - - −0.5 V to +5.5 V Output current (output low) - - - - - - - - - - - +20 mA Input current - - - - - - - - - - - - - - - - - - −12 mA to +5.0 mA Lead temperature (soldering, 10 seconds) - - - - - 300°C Thermal resistance, junction-to-case ( θ_JC): Case F, X - - - - - - - - - - - - - - - - - - - 30°C/W Case E, W - - - - - - - - - - - - - - - - - - - 30°C/W Case Y - - - - - - - - - - - - - - - - - - - - - 15°C/W Junction temperature (T_J) - - - - - - - - - - - - 165°C

Supply voltage- - - - - - - - - - - - - - - - 4.5 V minimum to 5.5 V maximum Minimum high level input voltage (V_IH)- - - - 2.1V Maximum low level input voltage (V_IL) - - - - 0.8 V Case operating temperature range- - - - - - - −55° to +125°C

intended Use:

Microcircuits conforming to this specification are intended for original equipment design applications and logisitic support of existing equipment.