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NPFC - MIL-M-38510/1

MICROCIRCUITS, DIGITAL, TTL, NAND GATES, MONOLITHIC SILICON

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Organization: NPFC
Publication Date: 1 June 1982
Status: inactive
Page Count: 31
scope:

This specification covers the detail requirements for monolithic silicon, TTL, positive NAND logic gating microcircuits. Three product assurance classes and a choice of case outline/lead finish are provided for each type and are reflected in the complete part number.

The part number shall be in accordance with MIL-M-38510, and as specified herein.

The device type shall be as follows:

Device type Circuit 01 Single, 8-input positive NAND gate 02 Dual, 4-input positive NAND gate 03 Triple, 3-input positive NAND gate 04 Quadruple, 2-input positive NAND gate 05 Hex, 1-input inverter gate 06 Triple, 3-input positive NAND gate (open collector output) 07 Quadruple, 2-input positive NAND gate (open collec- tor output) 08 Hex, 1-input inverter gate (open collector output) 09 Same as device type 07, except different pin connections

The device class shall be the product assurance level as defined in MIL-M-38510.

The case outline shall be designated as follows:

Letter Case outline (see MIL-M-38510, appendix C) A F-1 (14-lead, ¼" × ¼"), flat package B F-3 (14-lead, 3/16" × ¼"), flat package C D-1 (14-lead, ¼" × ¾"), dual-in-line package D F-2 (14-lead, ¼" × ⅜"), flat package

Supply voltage range - - - - - - - - - - - - −0.5 to +7.0 V Input voltage range- - - - - - - - - - - - - −1.5 at −12 mA to 5.5 V Storage temperature range- - - - - - - - - - −65° to +150°C Maximum power dissipation per gate (PD) 1/ - 40 mW Lead temperature (soldering, 10 seconds) - - 300°C Thermal resistance, junction-to-case (θJC): Case A, B, and D - - - - - - - - - - - - - 0.09°C/mW Case C - - - - - - - - - - - - - - - - - - 0.08°C/mW Junction temperature (TJ)- - - - - - - - - - 175°C

Beneficial comments (recommendations, additions, deletions) and any pertinent data which may be of use in improving this document should be addressed to: Rome Air Development Center (RBE-2), Griffiss AFB, NY 13441 by using the self-addressed Standardization Document Improvement Proposal (DD Form 1426) appearing at the end of this document or by letter.

Supply voltage- - - - - - - - - - - - - - - 4.5 minimum to 5.5 V maximum Minimum high level input voltage- - - - - - 2.0 V Maximum low level input voltage - - - - - - 0.8 V Normalized fanout.(each output) 2/- - - - - l0 maximum Case operating temperature range- - - - - - −55° to +125°c

intended Use:

Microcircuits conforming to this specification are intended for original equipment design applications and logistic support of existing... View More

Document History

November 4, 2014
Microcircuits, Digital, TTL, Nand Gates, Monolithic Silicon
A description is not available for this item.
January 27, 2010
Microcircuits, Digital, TTL, Nand Gates, Monolithic Silicon
This specification covers the detail requirements for monolithic silicon, TTL, positive NAND logic gating microcircuits. Two product assurance classes and a choice of case outlines and lead finishes...
March 16, 2005
MICROCIRCUITS, DIGITAL, TTL, NAND GATES, MONOLITHIC SILICON
This specification covers the detail requirements for monolithic silicon, TTL, positive NAND logic gating microcircuits. Two product assurance classes and a choice of case outlines and lead finishes...
June 24, 2002
MICROCIRCUITS, DIGITAL, TTL, NAND GATES, MONOLITHIC SILICON
A description is not available for this item.
October 6, 1995
MICROCIRCUITS, DIGITAL, TTL, NAND GATES, MONOLITHIC SILICON
A description is not available for this item.
December 3, 1992
MICROCIRCUITS, DIGITAL, TTL, NAND GATES, MONOLITHIC SILICON
A description is not available for this item.
July 17, 1985
MICROCIRCUITS, DIGITAL, TTL, NAND GATES, MONOLITHIC SILICON
A description is not available for this item.
November 9, 1984
MICROCIRCUITS, DIGITAL, TTL, NAND GATES, MONOLITHIC SILICON
A description is not available for this item.
MIL-M-38510/1
June 1, 1982
MICROCIRCUITS, DIGITAL, TTL, NAND GATES, MONOLITHIC SILICON
Microcircuits conforming to this specification are intended for original equipment design applications and logistic support of existing equipment.
MICROCIRCUITS, DIGITAL, TTL, NAND GATES, MONOLITHIC SILICON
A description is not available for this item.
June 28, 1976
MICROCIRCUITS, DIGITAL, TTL, NAND GATES, MONOLITHIC SILICON
A description is not available for this item.
December 1, 1975
MICROCIRCUITS, DIGITAL, TTL, NAND GATES, MONOLITHIC SILICON
A description is not available for this item.
January 6, 1975
MICROCIRCUITS, DIGITAL, TTL, NAND GATES, MONOLITHIC SILICON
A description is not available for this item.
January 4, 1974
MICROCIRCUITS, DIGITAL, TTL, NAND GATES, MONOLITHIC SILICON
A description is not available for this item.
October 15, 1973
MICROCIRCUITS, DIGITAL, TTL, NAND GATES, MONOLITHIC SILICON
A description is not available for this item.
July 6, 1973
MICROCIRCUITS, DIGITAL, TTL, NAND GATES, MONOLITHIC SILICON
A description is not available for this item.
December 23, 1971
MICROCIRCUITS, DIGITAL, TTL, NAND GATES, MONOLITHIC SILICON
A description is not available for this item.
June 1, 1971
MICROCIRCUITS, DIGITAL, TTL, NAND GATES, MONOLITHIC SILICON
A description is not available for this item.
April 30, 1971
MICROCIRCUITS, DIGITAL, TTL, NAND GATES, MONOLITHIC SILICON
A description is not available for this item.
February 1, 1971
MICROCIRCUITS, DIGITAL, TTL, NAND GATES, MONOLITHIC SILICON
A description is not available for this item.

References

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