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DLA - SMD-5962-89823 REV D

MICROCIRCUITS, MEMORY, DIGITAL, CMOS 9000 GATE PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON

inactive
Organization: DLA
Publication Date: 27 January 1994
Status: inactive
Page Count: 41
scope:

This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes Q and M) and space application (device class V), and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

The PIN shall be as shown in the following example:

Device class M RHA marked devices shall meet the MIL-I-38535 appendix A specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-I-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type(s) shall identify the circuit function as follows:

Device type Generic number Circuit function Toggle Speed 01 3090-50 16×20 9000 gate programmable array 50 MHz 02 3090-70 16×20 9000 gate programmable array 70 MHz 03 3090-100 16×20 9000 gate programmable array 100 MHz 04 3090-125 16×20 9000 gate programmable array 125 MHz

The device class designator shall be a single letter identifying the product assurance level as follows:

Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 Q or V Certification and qualification to MIL-I-38535

The case outlines shall be as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style X CMGA8-PN 175 1/ Pin grid array package Y See figure 1 164 Quad flat package Z See figure 1 164 Quad flat package U See figure 1 164 Quad flat package T See figure 1 164 Quad flat package

The lead finish shall be as specified in MIL-STD-883 (see 3.1 herein) for class M or MIL-I-38535 for classes Q and V. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference.

Supply voltage range to ground potential (VCC) - - - - - −0.5 V dc to +7.0 V dc DC input voltage range - - - - - - - - - - - - - - - - - −0.5 V dc to VCC +0.5 V dc Voltage applied to three-state output(VTS) - - - - - - - −0.5 V dc to VCC +0.5 V dc Lead temperature (soldering, 10 seconds) - - - - - - - - +260°C Thermal resistance, junction-to-case (θJC): Case outline X - - - - - - - - - - - - - - - - - - - See MIL-STD-1835 Case outlines Y, Z, U, T - - - - - - - - - - - - - - 20°C/W 3/ Junction temperature (TJ) - - - - - - - - - - - - - - - - +150°C 4/ Storage temperature range - - - - - - - - - - - - - - - - −65°C to +150°C

Case operating temperature Range(TC)- - - - - - - - - - - −55°C to +125°C Supply voltage relative to ground(VCC)- - - - - - - - - - +4.5 V dc minimum to +5.5 V dc maximum Ground voltage (GND) - - - - - - - - - - - - - - - - - - 0 V dc

Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012)- - - - - 95 percent

intended Use:

Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.

Microcircuits... View More

Document History

November 18, 2015
MICROCIRCUITS, MEMORY, DIGITAL, CMOS 9000 GATE PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device class Q and M) and space application (device class V). A choice of case outlines and lead finishes are...
April 27, 2007
MICROCIRCUITS, MEMORY, DIGITAL, CMOS 9000 GATE PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...
November 9, 2001
MICROCIRCUITS, MEMORY, DIGITAL, CMOS 9000 GATE PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON
A description is not available for this item.
October 4, 1996
MICROCIRCUITS, MEMORY, DIGITAL, CMOS 9000 GATE PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON
A description is not available for this item.
October 5, 1995
MICROCIRCUITS, MEMORY, DIGITAL, CMOS 9000 GATE PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON
A description is not available for this item.
SMD-5962-89823 REV D
January 27, 1994
MICROCIRCUITS, MEMORY, DIGITAL, CMOS 9000 GATE PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes Q and M) and...
September 10, 1993
MICROCIRCUITS, MEMORY, DIGITAL, CMOS 9000 GATE PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON
A description is not available for this item.
November 16, 1992
MICROCIRCUITS, MEMORY, DIGITAL, CMOS 9000 GATE PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON
A description is not available for this item.
December 19, 1991
MICROCIRCUITS, MEMORY, DIGITAL, CMOS 9000 GATE PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON
A description is not available for this item.
November 8, 1991
MICROCIRCUITS, MEMORY, DIGITAL, CMOS 9000 GATE PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON
A description is not available for this item.
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