scope:

This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes B, Q, and M) and space application (device classes S and V), and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". When available, a choice of radiation hardness assurance (RHA) levels are reflected in the PIN.

The PIN shall be as shown in the following example:

Device classes M, B, and S RHA marked devices shall meet the MIL-M-38510 specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-I-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type(s) shall identify the circuit function as follows:

Device type Generic number Circuit function 01 54ACT823 9-bit D flip-flop, positive edge triggered, TTL compatible input, three-state outputs

The device class designator shall be a single letter identifying the product assurance level as follows:

Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 B or S Certification and qualification to MIL-M-38510 Q or V Certification and qualification to MIL-I-38535

For device classes M, B, and S, case outline(s) shall meet the requirements in appendix C of MIL-M-38510 and as listed below. For device classes Q and V, case outline(s) shall meet the requirements of MIL-I-38535, appendix C of MIL-M-38510, and as listed below.

Outline letter Case outline K F-6 (24-lead, .640" × .420" × .090"), flat package L F-5 (24-lead, 1.280" × .310" × .200"), dual-in-line package 3 C-4 (28-lead, .460" × .460" × .100"), square chip carrier package

The Lead finish shall be as specified in MIL-M-38510 for classes M, B, and S or MIL-I-38535 for classes Q and V. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference.

Supply voltage range - - - - - - - - - - - - - - - −0.5 V dc to +6.0 V dc DC input voltage range - - - - - - - - - - - - - - −0.5 V dc to V_CC +0.5 V dc DC output voltage range - - - - - - - - - - - - - −0.5 V dc to V_CC + 0.5 V dc Clamp diode current - - - - - - - - - - - - - - - ±20 mA DC output current (per output pin) - - - - - - - - ±50 mA DC V_CC or GND current (per output pin) - - - - - - ±50 mA Storage temperature range - - - - - - - - - - - - −65°C to +150°C Maximum power dissipation (P_D) - - - - - - - - - - 500 mW Lead temperature (soldering, 10 seconds) - - - - - +300°C Thermal resistance, junction-to-case (Θ_JC) - - - - See MIL-M-38510, appendix C junction temperature (T_J) 2/ - - - - - - - - - - - +175°C

Supply voltage (V_CC) - - - - - - - - - - - - - - - 4.5 V dc to 5.5 V dc Case operating temperature range (T_C) - - - - - - −55°C to 125°C Input voltage range (V_IN) - - - - - - - - - - - - 0.0 V dc to V_CC Output voltage range (V_OUT) - - - - - - - - - - - 0.0 V dc to V_CC Input rise or fall times: V_CC = 4.5 V to 5.5 V - - - - - - - - - - - - - - 0 to 8 ns/V Minimum setup time, date (Dn) to clock (CP) (t_s1): T_C = +25°C, V_CC = 4.5 V - - - - - - - - - - - - 3.5 ns T_C = −55°C, +125°C, V_CC = 4.5 V - - - - - - - - 4.0 ns Minimum setup time, enable ([E bar][N bar]) to clock (CP) (t_s2): T_C = +25°C, V_CC = 4.5 V - - - - - - - - - - - - 3.5 ns T_C = −55°C, +125°C, V_CC = 4.5 V - - - - - - - - 4.0 ns Minimum hold time, Dn to CP (t_h1): T_C = +25°C, V_CC = 4.5 V - - - - - - - - - - - - 2.5 ns T_C = −55°C, +125°C, V_CC = 4.5 V - - - - - - - - 3.0 ns Minimum hold time [E bar][N bar] to CP (t_h2): T_C = +25°C, V_CC = 4.5 V - - - - - - - - - - - - 2.5 ns T_C = −55°C, +125°C, V_CC = 4.5 V - - - - - - - - 3.0 ns Minimum CP high, low, pulse width (t_w1): T_C = +25°C, V_CC = 4.5 V - - - - - - - - - - - - 5.0 ns T_C = −55°C, +125°C, V_CC = 4.5 V - - - - - - - - 6.0 ns Minimum clear ([C bar][L bar][R bar]) pulse width (t_w2): T_C = +25°C, V_CC = 4.5 V - - - - - - - - - - - - 6.0 ns T_C = −55°C, +125°C, V_CC = 4.5 V - - - - - - - - 7.0 ns Minimum recovery time, CLR to CP (t_rec): T_C = +25°C, V_CC = 4.5 V - - - - - - - - - - - - 4.0 ns T_C = −55°C, +125°C, V_CC = 4.5 V - - - - - - - - 4.5 ns Maximum clock frequency (f_MAX): T_C = +25°C, V_CC = 4.5 V - - - - - - - - - - - - 95 MHz T_C = −55°C, +125°C, V_CC = 4.5 V - - - - - - - - 95 MHz

Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) - - - - XX percent 3/

intended Use: