DLA - DSCC-DWG-87103 REV B
RESISTOR NETWORK, 9-PIN SIP, MULTIPLE VALUES, MULTIPLE TOLERANCES, LOW PROFILE
inactive
| Organization: | DLA |
| Publication Date: | 11 July 2000 |
| Status: | inactive |
| Page Count: | 11 |
scope:
This drawing describes the requirements for a 9 pin single in line package (SIP).
intended Use:
Resistor networks described herein are intended for use in electronic circuits where miniaturization is required.
Document History
June 6, 2016
RESISTOR NETWORK, 9-PIN SIP, MULTIPLE VALUES, MULTIPLE TOLERANCES, LOW PROFILE
Resistor networks described herein are intended for use in electronic circuits where miniaturization is required.
February 7, 2007
RESISTOR NETWORK, 9-PIN SIP, MULTIPLE VALUES, MULTIPLE TOLERANCES, LOW PROFILE
Resistor networks described herein are intended for use in electronic circuits where miniaturization is required.
DSCC-DWG-87103 REV B
July 11, 2000
RESISTOR NETWORK, 9-PIN SIP, MULTIPLE VALUES, MULTIPLE TOLERANCES, LOW PROFILE
Resistor networks described herein are intended for use in electronic circuits where miniaturization is required.
May 28, 1993
RESISTOR NETWORK, 9-PIN SIP, MULTIPLE VALUES, MULTIPLE TOLERANCES, LOW PROFILE
This drawing describes the requirements for a 9 pin single-in-line package (SIP), resistor network.
The complete part number shall be as shown in the following example:
February 3, 1988
RESISTOR NETWORK, 9-PIN SIP, MULTIPLE VALUES, MULTIPLE TOLERANCES, LOW PROFILE
A description is not available for this item.