DLA - SMD-5962-94634
MICROCIRCUIT, MEMORY, DIGITAL, CMOS 8000 GATE CONFIGURABLE LOGIC ARRAY, MONOLITHIC SILICON
| Organization: | DLA |
| Publication Date: | 23 June 1995 |
| Status: | inactive |
| Page Count: | 23 |
scope:
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes Q and M) and space application (device class V), and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.
The PIN shall be as shown in the following example:
Device class M RHA marked devices shall meet the MIL-I-38535 appendix A specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-I-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
The device type(s) shall identify the circuit function as follows:
Device type Generic number Circuit function Access time 01 8820-3 672 logic cell configurable array 38.2 ns
The device class designator shall be a single letter identifying the product assurance level as follows:
Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 Q or V Certification and qualification to MIL-I-38535
The case outlines shall be as designated in MIL-STD-1835 and as follows:
Outline letter Descriptive designator Terminals Package style x CMGA-P192 192 1/ Pin grid array package y see figure 1 208 Quad-flat package
The Lead finish shall be as specified in MIL-STD-883 (see 3.1 herein) for class M or MIL-I-38535 for classes Q and V. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference.
Supply voltage range to ground potential (VCC) - - - - - - - - −2.0 V dc to +7.0 V dc DC input voltage range - - - - - - - - - - - - - - - - - - - - −2.0 V dc to +7.0 V dc DC output current, IO, per pin- - - - - - - - - - - - - - - - - min −25 mA and max +25 mA DC supply current, ICC or ISS - - - - - - - - - - - - - - - - - 1000 mA Maximum power dissipation (PD) - - - - - - - - - - - - - - - - 5.5 W Lead temperature (soldering, 10 seconds) - - - - - - - - - - - +260°C Thermal resistance, junction-to-case (ΘJC): Case outline X - - - - - - - - - - - - - - - - - - - - - - See MIL-STD-1835 Case outline Y - - - - - - - - - - - - - - - - - - - - - - 12°C/W 5/ Junction temperature (TJ) - - - - - - - - - - - - - - - - - - - +150°C 3/ Storage temperature range - - - - - - - - - - - - - - - - - - - −65°C to +150°C
Case operating temperature Range(TC) - - - - - - - - - - - - - −55°C to +125°C Supply voltage relative to ground(VCC) - - - - - - - - - - - +4.5 V dc minimum to +5.5 V dc maximum Input voltage range - - - - - - - - - - - - - - - - - - - - - 0 V dc to VCC Output voltage range - - - - - - - - - - - - - - - - - - - - - 0 V dc to VCC Input rise time (tr) - - - - - - - - - - - - - - - - - - - - - 40 ns max Input fall time (tf) - - - - - - - - - - - - - - - - - - - - - 40 ns max
Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) - - - - - 5/ percent
intended Use:
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
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