scope:

This specification covers the detail requirements for monolithic silicon, Schottky TTL, shift register microcircuits. Qualification requirements are removed for device type 02. This device type is inactive for new design after the date of this revision. For the remaining device type 01, two product assurance classes and a choice of case outlines and lead finishes are provided and are reflected in the complete part number.

The part number shall be in accordance with MIL-M-38510, with the exception that the "JAN" or "J" certification mark shall not be used for device type 02.

The device type shall be as follows:

Device type Circuit 01 4 bit cascadable bidirectional shift register 02 3/ 4 bit cascadable parallel-access shift register

The device class shall be the product assurance level as defined in MIL-M-38510.

The case outline shall be designated as follows:

Outline letter Case outline (see MIL-M-38510, appendix C) E D-2 (16-lead, ¼" × ⅞"), dual-in-line package F F-5 (16-lead, ¼" × ⅜"), flat package

Supply voltage range- - - - - - - - - - - - −0.5 V dc to +7.0 V dc Input voltage range - - - - - - - - - - - - −1.2 V dc at −18 mA to +5.5 V dc Storage temperature range - - - - - - - - - −65°C to +150°C Maximum power dissipation (P_D) 1/ Device type 01- - - - - - - - - - - - - - 700 mW dc Device type 02 2/- - - - - - - - - - - - - 700 mW dc Lead temperature (Soldering, 10 seconds)- - +300°C Thermal resistance, junction-to-case (θ_JC): Cases E and F - - - - - - - - - - - - - - (See MIL-M-38510, appendix C) Junction temperature (T_J) 3/- - - - - - - - +175°C

Beneficial comments (recommendations, additions, deletions) and any pertinent data which may be of use in improving this document should be addressed to: Rome Air Development Center (RBE-2), Griffiss AFB, NY 13441, by using the self-addressed Standardization Document Improvement Proposal (DD Form 1426) appearing at the end of this document or by letter.

Supply voltage (V_CC) - - - - - - - - - - 4.5 V dc minimum to 5.5 V dc maximum Minimum high-level input voltage (V_IH) - 2.0 V dc Maximum low-level input voltage (V_IL) 4/ 0.8 V dc Case operating temperature range (T_C)- - −55°C to +125°C Fan out Device type 01 High logic level - - - - - - - - - - 20 Low logic level- - - - - - - - - - - 10 Device type 02 5/ High logic level - - - - - - - - - - 20 Low logic level- - - - - - - - - - - 10 Device type 01 Width of clock input pulse - - - - - 10 ns minimum Width of clear input pulse - - - - - 12 ns minimum t_P (data)- - - - - - - - - - - - - - 8 ns minimum Data input setup time- - - - - - - - 5 ns minimum Hold time at any input - - - - - - - 3 ns minimum Mode control setup time- - - - - - - 11 ns minimum Device type 02 5/ Width of clock input pulse - - - - - 10 ns minimum Width of clear input pulse - - - - - 12 ns minimum t_P (data)- - - - - - - - - - - - - - 8 ns minimum Shift load input setup time- - - - - 11 ns minimum Data input setup time- - - - - - - - 5 ns minimum Clear input setup time - - - - - - - 9 ns minimum Shift load release time- - - - - - - 6 ns minimum Data hold time - - - - - - - - - - - 3 ns minimum

intended Use: