DLA - DESC-DWG-87025 REV D

RESISTOR NETWORK, 8 PIN, DUAL-IN-LINE PACKAGE (DIP)

inactive

Organization:	DLA
Publication Date:	22 October 1993
Status:	inactive
Page Count:	8

scope:

This drawing describes the requirements for an 8 pin, resistor network.

The complete PIN shall be as shown in the following example:

The schematic of the resistor network shall be identified by a single letter in accordance with figure 1. The resistor element R_Ref shall be the reference resistor element used in determining the ratio accuracy (when applicable).

The characteristics shall be identified by a single letter and shall be in accordance with MIL-R-83401.

The resistance value designator shall be in accordance with MIL-R-83401. Resistance value designators for the "J" schematic are specified in table I. TABLE I. Resistance value designators for "J" schematic.

Resistance R1 R2 Resistance R1 R2 designator ohms ohms designator ohms ohms --------------------------------------------------------- A001 82 130 A008 220 330 A002 120 200 A009 330 390 A003 130 210 A010 330 470 A004 160 260 A011 330 680 A005 180 240 A012 1.5 k 3.3 k A006 180 390 A013 3 k 6.2 k A007 220 270

For available resistance tolerances and designators, see 3.3.1.

intended Use:

Resistor networks described herein are intended to be used in electronic circuits where miniaturization is required.