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DLA - SMD-5962-96854

MICROCIRCUIT, DIGITAL, ADVANCED HIGH SPEED CMOS, OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS, MONOLITHIC SILICON

inactive
Organization: DLA
Publication Date: 7 August 1996
Status: inactive
Page Count: 20
scope:

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

The PIN is as shown in the following example:

Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type identify the circuit function as follows:

Device type Generic number Circuit function 01 54AHC574 Octal Edge-Triggered D-Type Flip-Flop with 3-State Outputs

The device class designator is a single letter identifying the product assurance level as follows:

Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535

The case outlines are as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line S GDFP2-F20 or CDFP3-F20 20 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier

The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M.

Supply voltage range (VCC) ......................................... −0.5 V dc to +7.0 V dc DC input voltage range (VIN) ....................................... −0.5 V dc to +7.0 V dc 4/ DC output voltage range (VOUT) ..................................... −0.5 V dc to VCC + 0.5 V dc 4/ DC input clamp current (IIK) (VIN < 0.0 or VIN > VCC) .............. −20 mA DC output clamp current (IOK) (VOUT < 0.0 or VOUT > VCC) ........... ±20 mA Continuous output current (IO) (VOUT = 0 to VCC) ................... ±25 mA Continuous current through VCC or GND .............................. ±75 mA Storage temperature range (TSTG) ................................... −65°C to +150°C Lead temperature (soldering, 10 seconds) ........................... +300°C Thermal resistance, junction-to-case (ΘJC) ......................... See MIL-STD-1835 Junction temperature (TJ) .......................................... +175°C Maximum power dissipation at TA = +55°C (in still air) (PD) ........ 700 mW

Supply voltage range (VCC) ......................................... +2.0 V dc to +5.5 V dc Minimum high level input voltage (VIH): VCC = 2 V ........................................................ +1.5 V VCC = 3 V ........................................................ +2.1 V VCC = 5.5 V ...................................................... +3.85 V Maximum low level input voltage (VIL): VCC = 2 V ........................................................ +0.5 V VCC = 3 V ........................................................ +0.9 V VCC = 5.5 V ...................................................... +1.65 V Input voltage range (VIN) .......................................... +0.0 V dc to 5.5 V dc Output voltage range (VOUT) ........................................ +0.0 V dc to VCC Maximum high level output current (IOH): VCC = 2 V ........................................................ −50µA VCC = 3.3 V ± 0.3 V .............................................. −4 mA VCC = 5 V ± 0.5 V ................................................ −8 mA Maximum low level output current (IOL): VCC = 2 V ........................................................ +50 µA VCC = 3.3 V ± 0.3 V .............................................. +4 mA VCC = 5 V ± 0.5 V ................................................ +8 mA Maximum input rise or fall rate (Δt/ΔV): VCC = 3.3 V ± 0.3 V .............................................. 100 ns/V VCC = 5 V ± 0.5 V ................................................ 20 ns/V Case operating temperature range (TC) .............................. −55°C to +125°C

Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) ....................... XX percent 6/

intended Use:

Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.

Microcircuits... View More

Document History

February 22, 2021
MICROCIRCUIT, DIGITAL, ADVANCED HIGH SPEED CMOS, OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS, MONOLITHIC SILICON
Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V). A choice of case outlines and lead finishes...
July 28, 2014
MICROCIRCUIT, DIGITAL, ADVANCED HIGH SPEED CMOS, OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V). A choice of case outlines and lead finishes are...
June 3, 2008
MICROCIRCUIT, DIGITAL, ADVANCED HIGH SPEED CMOS, OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...
SMD-5962-96854
August 7, 1996
MICROCIRCUIT, DIGITAL, ADVANCED HIGH SPEED CMOS, OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...

References

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