DLA - SMD-5962-96769 REV A
MICROCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, 10-BIT BUS-INTERFACE D-TYPE LATCH WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON
| Organization: | DLA |
| Publication Date: | 5 October 1998 |
| Status: | inactive |
| Page Count: | 20 |
scope:
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.
The PIN is as shown in the following example:
Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
The device type(s) identify the circuit function as follows:
Device type Generic number Circuit function 01 54ABT841 10-bit bus-interface D-type latch with three-state outputs, TTL compatible inputs
The device class designator is a single letter identifying the product assurance level as follows:
Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535
The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter Descriptive designator Terminals Package style L GDIP3-T24 or CDIP4-T24 24 Dual-in-line K GDFP2-F24 or CDFP3-F24 24 Flat pack 3 CQCC1-N28 28 Square leadless chip carrier
The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M.
Supply voltage range (VCC) −0.5 V dc to +7.0 V dc DC input voltage range (VIN) −0.5 V dc to +7.0 V dc 4/ DC output voltage range applied to any output in the high state or power-off state (VOUT) −0.5 V dc to +7.0 V dc 4/ DC output current (IOL) (per output) +96 mA DC input clamp current (IIK) (VIN < 0.0 V) −18 mA DC output clamp current (IOK) (VOUT < 0.0 V) −50 mA Storage temperature range (TSTG) −65°C to +150°C Lead temperature (soldering, 10 seconds) +300°C Thermal resistance, junction-to-case (θJC) See MIL-STD-1835 Junction temperature (TJ) +175°C Maximum package power dissipation (PD) 500 mW
Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VCC Output voltage range (VOUT) +0.0 V dc to VCC Maximum low level input voltage (VIL) 0.8 V Minimum high level input voltage (VIH) 2.0 V Maximum high level output current (IOH) −24 mA Maximum low level output current (IOL) +48 mA Maximum input transition rise or fall rate (Δt/ΔV) 5 ns/V Minimum power-up ramp rate (Δt/ΔVCC) 200 μs/V Case operating temperature range (TC) −55°C to +125°C
Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) XX percent 5/
intended Use:
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
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