scope:

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

The PIN is as shown in the following example:

Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type(s) identify the circuit function as follows:

Device type Generic number Circuit function 01 HX84050 4 × 32 k × 40 CMOS, SOI, SRAM, Multichip Module (MCM)

The device class designator is a single letter identifying the product assurance level as follows:

Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535

The case outline(s) are as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style X See figure 1 200 Quad flat pack

The lead finish is as specified in MIL-PRF-38535 of device classes Q and V or MIL-PRF-38535, appendix A for device class M.

Storage temperature range ............................... −65°C to + 125°C Supply voltage range (V_DD) .............................. −0.5 V dc to 6.5 V dc DC input voltage range (V_IN) ............................ −0.5 V dc to V_DD + 0.3 V dc DC output voltage range (V_OUT) .......................... −0.5 V dc to V_DD + 0.3 V dc Output voltage applied to high-Z state .................. −0.3 V dc to V_DD + 0.3 V dc Maximum power dissipation (P_D) .......................... 5.6 W 3/ Lead temperature (soldering, 10 seconds) ................ +288°C Chip thermal resistance, junction-to-case (θ_JC) .......... 4.0° C/W 4/ Maximum junction temperature (T_J) ....................... +175°C

Supply voltage range (V_DD) .............................. 4.5 V dc to 5.5 V dc Supply voltage (V_SS) .................................... 0.0 V dc High level input voltage range, CMOS levels (V_IH) ....... 0.7 V_DD to V_DD + 0.3 V dc Low level input voltage range, CMOS levels (V_IL) ........ −0.3 V dc to 0.3 V_DD Module thermal resistance, junction-to-case (θ_JC) ....... 1.0°C/W (module power) 4/ Case operating temperature range (T_C) ................... −55°C to + 125°C

Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) ............ 100 percent

intended Use: