UNLIMITED FREE
ACCESS
TO THE WORLD'S BEST IDEAS

SUBMIT
Already a GlobalSpec user? Log in.

This is embarrasing...

An error occurred while processing the form. Please try again in a few minutes.

Customize Your GlobalSpec Experience

Finish!
Privacy Policy

This is embarrasing...

An error occurred while processing the form. Please try again in a few minutes.

NPFC - MIL-M-38510/5

MICROCIRCUITS, DIGITAL, TTL, AND-OR-INVERT GATES, MONOLITHIC SILICON

inactive
Buy Now
Organization: NPFC
Publication Date: 20 May 1985
Status: inactive
Page Count: 23
scope:

This specification covers the detail requirements for monolithic, silicon, TTL, AND-OR-INVERT logic gating microcircuits. Two product assurance classes and a choice of case outlines and lead finishes are provided and are reflected in the complete part number.

The complete part number shall be in accordance with MIL-M-38510.

The device type shall identify the circuit function as follows:

Device type Circuit 01 Expandable Dual 2-wide, 2-input AND-OR-INVERT gate 02 Dual 2-wide, 2-input AND-OR-INVERT gate 03 Expandable 4-wide, 2-input AND-OR-INVERT gate 04 4-wide, 2-input AND-OR-INVERT gate

The device class shall be the product assurance level as defined in MIL-M-38510.

The case outline shall be as designated in appendix C of MIL-M-38510, and as follows:

Outline letter MIL-M-38510, appendix C, case outline A F-1 (14-pin, ¼" × ¼"), flat-package B F-3 (14-pin, 3/16" × ⅛"), flat-package C D-1 (14-pin, ¼" × ¾"), dual-in-line-package D F-2 (14-pin, ¼ × ⅜"), flat-package

Supply voltage range- - - - - - - - - - - - −0.5 V dc to 7.0 V dc Input voltage range - - - - - - - - - - - - −1.5 V dc at −12 mA to 5.5 V dc Storage temperature range - - - - - - - - - −65°C to 150°C Power dissipation per gate (PD) 1/ 01, 02 ---- 51 mWdc 03, 04 ---- 68 mWdc Lead temperature (soldering, 10 seconds)- - 300°C Thermal resistance, junction-to-case (θJC): Cases A, B, C and D - - - - - - - - - - - (See MIL-M-38510 Appendix C) 2/ Junction temperature (TJ) - - - - - - - +175°C 3/

Beneficial comments (recommendations, additions, deletions) and any pertinent data which may be of use in improving this document should be addressed to: Rome Air Development Center (RBE-2), Griffiss AFB, NY 13441, by using the self-addressed Standardization Document Improvement Proposal (DD Form 1426) appearing at the end of this document or by letter.

Supply voltage(VCC) - - - - - - - - - - - 4.5 V dc minimum to 5.5 V dc maximum Minimum high-level input voltage (VIH)- - 2.0 V dc Maximum low-level input voltage (VIL) - - 0.8 V dc Normalized fanout (each output) 4/- - - - 10 maximum Case operating temperature range (TC) - - −55°C to +125°C

intended Use:

Microcircuits conforming to this specification are intended for use for Government microcircuit applications (original equipment) and logisitic purposes.

Document History

November 28, 2023
Microcircuits, Digital, TTL, and-or-Invert Gates, Monolithic Silicon
A description is not available for this item.
January 17, 2014
Microcircuits, Digital, TTL, and-or-Invert Gates, Monolithic Silicon
A description is not available for this item.
April 2, 2009
Microcircuits, Digital, TTL, and-or-Invert Gates, Monolithic Silicon
This specification covers the detail requirements for monolithic silicon, TTL, AND-OR-INVERT logic gating microcircuits. Two product assurance classes and a choice of case outlines/lead finish are...
June 1, 2004
MICROCIRCUITS, DIGITAL, TTL, AND-OR-INVERT GATES, MONOLITHIC SILICON
This specification covers the detail requirements for monolithic silicon, TTL, AND-OR-INVERT logic gating microcircuits. Two product assurance classes and a choice of case outlines/lead finish are...
July 31, 1999
MICROCIRCUITS, DIGITAL, TTL, AND-OR-INVERT GATES, MONOLITHIC SILICON
A description is not available for this item.
September 7, 1995
MICROCIRCUITS, DIGITAL, TTL, AND-OR-INVERT GATES, MONOLITHIC SILICON
A description is not available for this item.
November 6, 1987
MICROCIRCUITS, DIGITAL, TTL, AND-OR-INVERT GATES, MONOLITHIC SILICON
A description is not available for this item.
MIL-M-38510/5
May 20, 1985
MICROCIRCUITS, DIGITAL, TTL, AND-OR-INVERT GATES, MONOLITHIC SILICON
This specification covers the detail requirements for monolithic, silicon, TTL, AND-OR-INVERT logic gating microcircuits. Two product assurance classes and a choice of case outlines and lead finishes...
December 28, 1984
MICROCIRCUITS, DIGITAL, TTL, AND-OR-INVERT GATES, MONOLITHIC SILICON
A description is not available for this item.
MICROCIRCUITS, DIGITAL, TTL, AND-OR-INVERT GATES, MONOLITHIC SILICON
A description is not available for this item.
April 13, 1977
MICROCIRCUITS, DIGITAL, TTL, AND-OR-INVERT GATES, MONOLITHIC SILICON
A description is not available for this item.
August 12, 1976
MICROCIRCUITS, DIGITAL, TTL, AND-OR-INVERT GATES, MONOLITHIC SILICON
A description is not available for this item.
June 21, 1976
MICROCIRCUITS, DIGITAL, TTL, AND-OR-INVERT GATES, MONOLITHIC SILICON
A description is not available for this item.
May 20, 1976
MICROCIRCUITS, DIGITAL, TTL, AND-OR-INVERT GATES, MONOLITHIC SILICON
A description is not available for this item.
December 1, 1975
MICROCIRCUITS, DIGITAL, TTL, AND-OR-INVERT GATES, MONOLITHIC SILICON
A description is not available for this item.
September 12, 1973
MICROCIRCUITS, DIGITAL, TTL, AND-OR-INVERT GATES, MONOLITHIC SILICON
A description is not available for this item.
January 10, 1973
MICROCIRCUITS, DIGITAL, TTL, AND-OR-INVERT GATES, MONOLITHIC SILICON
A description is not available for this item.
June 21, 1972
MICROCIRCUITS, DIGITAL, TTL, AND-OR-INVERT GATES, MONOLITHIC SILICON
A description is not available for this item.
December 6, 1971
MICROCIRCUITS, DIGITAL, TTL, AND-OR-INVERT GATES, MONOLITHIC SILICON
A description is not available for this item.
April 30, 1971
MICROCIRCUITS, DIGITAL, TTL, AND-OR-INVERT GATES, MONOLITHIC SILICON
A description is not available for this item.

References

Advertisement