scope:

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

The PIN is as shown in the following example:

Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type(s) identify the circuit function as follows:

Device type Generic number Circuit function 01 54ABT18646 Scan test device with 18-bit bus transceiver and register, three-state outputs and TTL compatible inputs

The device class designator is a single letter identifying the product assurance level as follows:

Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535

The case outline(s) are as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style X See figure 1 68 Quad flat pack

The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M.

Supply voltage range (V_CC) . . . . . . . . . . . . . . . . . . . . . . . −0.5 V dc to +7.0 V dc DC input voltage range (I/O ports) (V_IN) . . . . . . . . . . . . . . . . −0.5 V dc to +5.5 V dc 4/ DC input voltage range (except I/O ports) (V_IN) . . . . . . . . . . . . −0.5 V dc to +7.0 V dc 4/ DC output voltage range (V_OUT) . . . . . . . . . . . . . . . . . . . . . −0.5 V dc to +5.5 V dc 4/ DC output current (I_OL) (per output) . . . . . . . . . . . . . . . . . . +96 mA DC input clamp current (I_IK) (V_IN < 0.0 V) . . . . . . . . . . . . . . . −18 mA DC output clamp current (I_OK) (V_OUT < 0.0 V) . . . . . . . . . . . . . . −50 mA Storage temperature range (T_STG) . . . . . . . . . . . . . . . . . . . . −65°C to +150°C Lead temperature (soldering, 10 seconds) . . . . . . . . . . . . . . . . +300°C Thermal resistance, junction-to-case (Θ_JC) . . . . . . . . . . . . . . 1.9°C/W Junction temperature (T_J) . . . . . . . . . . . . . . . . . . . . . . . +175°C Maximum power dissipation (P_D) . . . . . . . . . . . . . . . . . . . . . 684 mW 5/

Supply voltage range (V_CC) . . . . . . . . . . . . . . . . . . . . . . . +4.5 V dc to +5.5 V dc Input voltage range (V_IN) . . . . . . . . . . . . . . . . . . . . . . . +0.0 V dc to V_CC Output voltage range (V_OUT) . . . . . . . . . . . . . . . . . . . . . . +0.0 V dc to V_CC Maximum low level input voltage (V_IL) . . . . . . . . . . . . . . . . . 0.8 V Minimum high level input voltage (V_IH) . . . . . . . . . . . . . . . . . 2.0 V Maximum high level output current (I_OH) . . . . . . . . . . . . . . . . −24 mA Maximum low level output current (I_OL) . . . . . . . . . . . . . . . . . +48 mA Maximum input rise or fall rate (Δt/ΔV) . . . . . . . . . . . . . . . . 10 ns/V Minimum setup time (t_s): mAn before mCLKAB† or mBn before mCLKBA† . . . . . . . . . . . . . . . 6.2 ns mAn, mBn, mCLKAB, mCLKBA, mSAB, mSBA, mDIR, or m[O bar][E bar] before TCK† . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.4 ns TDI before TCK† . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.5 ns TMS before TCK† . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.0 ns Minimum hold time (t_h): mAn after mCLKAB† or mBn after mCLKBA† . . . . . . . . . . . . . . . . 0.6 ns mAn, mBn, mCLKAB, mCLKBA, mSAB, mSBA, mDIR, or m[O bar][E bar] after TCK† . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.7 ns TDI after TCK† . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 ns TMS after TCK† . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 ns Minimum pulse width (t_w): mCLKAB or mCLKBA, high or low . . . . . . . . . . . . . . . . . . . . 5.0 ns TCK, high or low . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.2 ns Maximum clock frequency (f_CLK): mCLKAB or mCLKBA . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 MHz TCK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 MHz Case operating temperature range (T_C) . . . . . . . . . . . . . . . . . −55°C to +125°C

Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) . . . . . . . . . . . . . XX percent 6/

intended Use: