JEDEC JESD 82-17
Definition of the SSTUA32S868 and SSTUA32D868 Registered Buffer with Parity for 2R x 4 DDR2 RDIMM Applications
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| Organization: | JEDEC |
| Publication Date: | 1 November 2005 |
| Status: | active |
| Page Count: | 32 |
scope:
This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the SSTUA32S868 and SSTUA32D868 registered buffer with parity test for DDR2 RDIMM applications.
Document History
January 1, 2023
Definition of the SSTUA32S868 and SSTUA32D868 Registered Buffer with Parity for 2R x 4 DDR2 RDIMM Applications
This standard defines standard specifications of DC interface parameters, switching parameters, and test loading for definition of the SSTUA32S868 and SSTUA32D868 registered buffer with parity test...
JEDEC JESD 82-17
November 1, 2005
Definition of the SSTUA32S868 and SSTUA32D868 Registered Buffer with Parity for 2R x 4 DDR2 RDIMM Applications
This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the SSTUA32S868 and SSTUA32D868 registered buffer with parity test...
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