scope:

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

The PIN is as shown in the following examples.

For device classes M and Q:

For device class V:

Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type(s) identify the circuit function as follows:

Device type Generic number Circuit function 01 54AC175 Quad D-type flip-flop with master reset

The device class designator is a single letter identifying the product assurance level as listed below. Since the device class designator has been added after the original issuance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the device.

Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535

The case outline(s) are as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line F GDFP2-F16 or CDFP3-F16 16 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier

The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M.

Supply voltage range (V_CC)................................ −0.5 V dc to +6.0 V dc DC input voltage range (V_IN).............................. −0.5 V dc to V_CC + 0.5 V dc DC output voltage range (V_OUT)............................ −0.5 V dc to V_CC + 0.5 V dc DC input diode current.................................... ±20 mA DC output diode current (per output pin).................. ±50 mA DC output source or sink current (per output pin)......... ±50 mA DC V_CC or GND current (per pin)........................... ±100 mA Maximum power dissipation (P_D)............................ 500 mW Storage temperature range (T_STG).......................... −65°C to +150°C Lead temperature (soldering, 10 seconds).................. +300°C Thermal resistance, junction-to-case (Θ_JC)................ See MIL-STD-1835 Junction temperature (T_J)................................. +175°C 4/

Supply voltage range (V_CC)................................ 3.0 V dc to +5.5 V dc Input voltage range (V_IN)................................. +0.0 V dc to V_CC Output voltage range (V_OUT)............................... +0.0 V dc to V_CC Minimum high level input voltage (V_IH): V_CC = 3.0 V.............................................. 2.10 V dc V_CC = 4.5 V.............................................. 3.15 V dc V_CC = 5.5 V.............................................. 3.85 V dc Maximum low level input voltage (V_IL): V_CC = 3.0 V.............................................. 0.90 V dc V_CC = 4.5 V.............................................. 1.35 V dc V_CC = 5.5 V.............................................. 1.65 V dc Case operating temperature range (T_C)..................... −55°C to +125°C Input rise or fall times: V_CC = 3.6 V to 5.5 V................................. 0 to 8 ns/V Minimum setup time, Dn to CP (t_s): T_C = +25°C, V_CC = 3.0 V.............................. 4.5 ns T_C = +25°C, V_CC = 4.5 V.............................. 3.0 ns T_C = −55°C and +125°C, V_CC = 3.0 V................... 5.0 ns T_C = −55°C and +125°C, V_CC = 4.5 V................... 3.5 ns

Minimum hold time, Dn to CP (t_h): T_C = +25°C, V_CC = 3.0 V ...............................2.0 ns T_C = +25°C, V_CC = 4.5 V ...............................2.5 ns T_C = −55°C and +125°C, V_CC = 3.0 V ....................2.0 ns T_C = −55°C and +125°C, V_CC = 4.5 V ....................2.5 ns Minimum pulse width CP (t_w): T_C = +25°C, V_CC = 3.0 V................................5.0 ns T_C = +25°C, V_CC = 4.5 V................................5.0 ns T_C = −55°C and +125°C, V_CC = 3.0 V.....................6.0 ns T_C = −55°C and +125°C, V_CC = 4.5 V.....................5.0 ns Minimum pulse width [M bar][R bar] (t_w): T_C = +25°C, V_CC = 3.0 V................................5.0 ns T_C = +25°C, V_CC = 4.5 V................................5.0 ns T_C = −55°C and +125°C, V_CC = 3.0 V.....................5.5 ns T_C = −55°C and +125°C, V_CC = 4.5 V.....................5.0 ns Minimum recovery time, [M bar][R bar] to CP (t_rec): T_C = +25°C, V_CC = 3.0 V................................1.5 ns T_C = +25°C, V_CC = 4.5 V................................1.5 ns T_C = −55°C and +125°C, V_CC = 3.0 V.....................1.5 ns T_C = −55°C and +125°C, V_CC = 4.5 V.....................1.5 ns Maximum frequency, CPn (f_max): T_C = +25°C, V_CC = 3.0 V................................95 MHz T_C = +25°C, V_CC = 4.5 V................................95 MHz T_C = −55°C and +125°C, V_CC = 3.0 V.....................95 MHz T_C = −55°C and +125°C, V_CC = 4.5 V.....................95 MHz

Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012)............. XX percent 6/

intended Use: