scope:

This specification covers the detail requirements for monolithic silicon, transistor arrays. Three product assurance classes and a choice of case outline and lead finish are provided for each type and are reflected in the complete part number.

The complete part number shall be as shown in the following example:

The device type shall be as shown in the following:

Device type Circuit 01 Two isolated NPN transistors and one NPN Darlington connected pair, general purpose. 02 Three isolated NPN transistors and one NPN differentially connected pair, general purpose.

The device class shall be the product assurance level as defined in MIL-M-38510.

The case outline shall be designated as follows:

Outline letter MIL-M-38510, appendix C, case outline A F-1 (14-lead, ¼" × ¼", flat-pack) C D-1 (14-lead, ¼" × ¾", dual-in-line) D F-2 (14-lead, ¼" × ⅜", flat-pack) M See figure 3 (12-lead can)

Collector - base voltage 2/- - - - - - - - - - - - 40 Vdc Collector - emitter voltage 2/ - - - - - - - - - - 15 Vdc Collector - substrate voltage 3/ - - - - - - - - - 60 Vdc Emitter - base voltage 2/- - - - - - - - - - - - - 5 Vdc Power dissipation 2/ - - - - - - - - - - - - - - - 300 mW Collector current 2/ - - - - - - - - - - - - - - - 50 mA Storage temperature range- - - - - - - - - - - - - −65°C to +150°C Junction temperature - - - - - - - - - - - - - - - 175°C Lead temperature (soldering, 60 seconds) - - - - - 300°C

Collector - base voltage 2/- - - - - - - - - - - - 32 Vdc Collector - emitter voltage 2/ - - - - - - - - - - 12 Vdc Ambient temperature range- - - - - - - - - - - - - −55°C to +125°C

Case Maximum allowable Maximum Maximum Package outline power dissipation θ_JC θ_JA 14-lead flat-pack A, D 350 mW @ T_A = 125°C 60°C/W 140°C/W Dual-in-line C 400 mW @ T_A = 125°C 40°C/W 120°C/W 12-lead can M 350 mW @ T_A = 125°C 60°C/W 140°C/W

intended Use:

Microcircuits conforming to this specification are intended for use for Government microcircuit applications (original equipment) and logistic purposes.