UNLIMITED FREE
ACCESS
TO THE WORLD'S BEST IDEAS

SUBMIT
Already a GlobalSpec user? Log in.

This is embarrasing...

An error occurred while processing the form. Please try again in a few minutes.

Customize Your GlobalSpec Experience

Finish!
Privacy Policy

This is embarrasing...

An error occurred while processing the form. Please try again in a few minutes.

NPFC - MIL-M-38510/72

MICROCIRCUITS, DIGITAL, BIPOLAR, SCHOTTKY TTL, NAND BUFFERS, MONOLITHIC SILICON

inactive
Buy Now
Organization: NPFC
Publication Date: 20 October 1987
Status: inactive
Page Count: 12
scope:

This specification covers the detail requirements for monolithic, silicon, Schottky TTL, positive NAND buffer microcircuits. Two product assurance classes and a choice of case outlines and lead finishes are provided and are reflected in the complete part number.

The complete part number shall be in accordance with MIL-M-38510, and as specified herein.

The device type shall be as follows:

Device type Circuit 01 Dual, 4-input, positive NAND buffer

Device class shall be the product assurance level as defined in MIL-M-38510.

The case outlines shall be designated as follows:

Outline letter Case outline (see MIL-M-38510, appendix C) A F-1 (14-lead, ¼" × ¼"), flat package B F-3 (14-lead, 3/16" × ¼"), flat package C D-1 (14-lead, ¼" × ¾"), dual-in-line package D F-2 (14-lead, ¼" × ⅜"), flat package X C-2A (20-terminal, .350" × .350"), square chip carrier package 2 C-2 (20-terminal, .350" × .350"), square chip carrier package

Supply voltage range- - - - - - - - - - - - −0.5 V dc to +7.0 V dc Input voltage range - - - - - - - - - - - - −1.2 V dc at −18 mA to +5.5 V dc Storage temperature range - - - - - - - - - −65°C to +150°C Maximum power dissipation (PD) - - - - - - 121 ,mW dc per buffer 1/ Lead temperature (soldering, 10 seconds)- - +300°C Thermal resistance, junction-to-case (θJC): Cases A, B, C, D, X, and 2- - - - - - - - See MIL-M-38510, appendix C Junction temperature (TJ)2/ - - - - - - - - +175°C

Beneficial comments (recommendations, additions, deletions) and any pertinent data which may be of use in improving this document should be addressed to: Rome Air Development Center (RBE-2), Griffiss AFB, NY 13441, by using the self-addressed Standardization Document Improvement Proposal (DD Form 1426) appearing at the end of this document or by letter.

Supply voltage (VCC)- - - - - - - - - - - 4.5 V dc minimum to 5.5 V dc maximum Minimum high-level input voltage (VIH)- - 2.0 V dc Maximum low-level input voltage (VIL) 3/- 0.8 V dc Normalized fan-out (each output) 4/ - - - 30 maximum Case operating temperature range (TC) - - −55°C to +125°C

intended Use:

Microcircuits conforming to this specification are intended for original equipment design applications and logistic support of existing equipment.

Document History

May 7, 2015
Microcircuits, Digital, Bipolar, Schottky TTL, Nand Buffers, Monolithic Silicon
A description is not available for this item.
August 3, 2010
Microcircuits, Digital, Bipolar, Schottky TTL, Nand Buffers, Monolithic Silicon
This specification covers the detail requirements for monolithic, silicon, Schottky TTL, positive NAND buffer microcircuits. Two product assurance classes and a choice of case outlines and lead...
October 12, 2005
MICROCIRCUITS, DIGITAL, BIPOLAR, SCHOTTKY TTL, NAND BUFFERS, MONOLITHIC SILICON
This specification covers the detail requirements for monolithic, silicon, Schottky TTL, positive NAND buffer microcircuits. Two product assurance classes and a choice of case outlines and lead...
July 26, 2002
MICROCIRCUITS, DIGITAL, BIPOLAR, SCHOTTKY TTL, NAND BUFFERS, MONOLITHIC SILICON
A description is not available for this item.
August 23, 1996
MICROCIRCUITS, DIGITAL, BIPOLAR, SCHOTTKY TTL, NAND BUFFERS, MONOLITHIC SILICON
A description is not available for this item.
November 23, 1992
MICROCIRCUITS, DIGITAL, BIPOLAR, SCHOTTKY TTL, NAND BUFFERS, MONOLITHIC SILICON
A description is not available for this item.
MIL-M-38510/72
October 20, 1987
MICROCIRCUITS, DIGITAL, BIPOLAR, SCHOTTKY TTL, NAND BUFFERS, MONOLITHIC SILICON
This specification covers the detail requirements for monolithic, silicon, Schottky TTL, positive NAND buffer microcircuits. Two product assurance classes and a choice of case outlines and lead...
May 24, 1985
MICROCIRCUITS, DIGITAL, BIPOLAR, SCHOTTKY TTL, NAND BUFFERS, MONOLITHIC SILICON
A description is not available for this item.
June 14, 1984
MICROCIRCUITS, DIGITAL, BIPOLAR, SCHOTTKY TTL, NAND BUFFERS, MONOLITHIC SILICON
A description is not available for this item.
September 2, 1983
MICROCIRCUITS, DIGITAL, BIPOLAR, SCHOTTKY TTL, NAND BUFFERS, MONOLITHIC SILICON
A description is not available for this item.
April 2, 1979
MICROCIRCUITS, DIGITAL, BIPOLAR, SCHOTTKY TTL, NAND BUFFERS, MONOLITHIC SILICON
A description is not available for this item.
February 14, 1977
MICROCIRCUITS, DIGITAL, BIPOLAR, SCHOTTKY TTL, NAND BUFFERS, MONOLITHIC SILICON
A description is not available for this item.
May 7, 1976
MICROCIRCUITS, DIGITAL, BIPOLAR, SCHOTTKY TTL, NAND BUFFERS, MONOLITHIC SILICON
A description is not available for this item.
June 3, 1974
MICROCIRCUITS, DIGITAL, BIPOLAR, SCHOTTKY TTL, NAND BUFFERS, MONOLITHIC SILICON
A description is not available for this item.

References

Advertisement