scope:

This specification covers the detail requirements for PNP, silicon, power transistors. Two levels of product assurance is provided for each device type as specified in MIL-S-19500.

See 3.3.

P_T 1/ V_CBO V_CEO V_EBO I_C I_B T_OP and T_STG R_ΘJC Type ----------------------- T_C = +23°C T_C = +100°C ---------------------------------------------------------------------------------------------- W W V dc V dc V dc A dc A dc °C °C/W 2N6437 200 112 120 100 6 25 10 −55 TO +200 .875 max 2N6438 200 112 140 100 6 25 10 −55 TO +200 .875 max

h_FE1 1/ h_FE2 1/ V_CE(sat)2 V_CE(sat)1 V_BE(sat)1 Switching Limits V_CE = 2 V dc V_CE = 2 V dc I_C = 25 A dc I_C = 10 A dc I_C = 10 A dc I_C = 25 A dc I_C = 10 A dc I_B = 2.5 A dc I_B = 1.0 A dc I_B = 1.0 A dc t_on t_off ---------------------------------------------------------------------------------------------------- V dc V dc V dc µs µs ---- ---- ---- -- -- Min 12 30 Max 120 1.8 1.0 1.8 0.5 1.25 C_obo |h_fe| V_CB = 10 V dc V_CE = 10 V dc I_E = 0 I_C = 1 A dc .1 MHz ≤ f ≤ 1 MHz f = 10 MHz ------------------------------------------------- pF -- Min 4 Max 700 12

Beneficial comments (recommendations, additions, deletions) and any pertinent data which may be of use in improving this document should be addressed to: US Army Research Laboratory and Power Sources Directorate, ATTN: AMSRL-EP-RD, Ft. Monmouth, NJ 07703-5601 by using the Standardization Document Proposal (DD Form 1426) appearing at the end of this document or by letter.