scope:

This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes Q and M) and space application (device class V), and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

The PIN shall be as shown in the following example:

Device class M RHA marked devices shall meet the MIL-I-38535 appendix A specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-I-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type(s) shall identify the circuit function as follows:

Device type Generic number Circuit function 01 HS-3374RH Radiation hardened, 8-bit bidirectional CMOS/TTL level converter

The device class designator shall be a single letter identifying the product assurance level as follows:

Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 Q or V Certification and qualification to MIL-I-38535

The case outline(s) shall be as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style W CDIP2-T22 22 Dual-in-line

The lead finish shall be as specified in MIL-STD-883 (see 3.1 herein) for class M or MIL-I-38535 for classes Q and V. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference.

Supply voltage (V_DD) . . . . . . . . . . . . . . . . . +11.0 V Supply voltage (V_CC) . . . . . . . . . . . . . . . . . +V_DD I/O voltage applied . . . . . . . . . . . . . . . . . . GND −0.3V to V_DD +0.3 V Maximum package power dissipation (T_A = +125°C) . . . . 0.67 W 2/ Thermal resistance, junction-to-case (Θ_JC) . . . . . . 12.3°C/W Thermal resistance, junction-to-ambient (Θ_JA) . . . . 74.8°C/W Junction temperature (T_J) . . . . . . . . . . . . . . . +175°C Storage temperature range . . . . . . . . . . . . . . . −65°C to +150°C Lead temperature (soldering, 10 seconds) . . . . . . . +300°C

Supply voltage ranges: V_DD . . . . . . . . . . . . . . . . . . . . . . . . . +9.5 V to 10.5 V V_CC . . . . . . . . . . . . . . . . . . . . . . . . . +4.75 V to 5.25 V Input voltage ranges: Data inputs (CMOS) . . . . . . . . . . . . . . . . GND −0.3V to V_DD +0.3 V Data inputs (TTL) . . . . . . . . . . . . . . . . . . GND −0.3V to V_CC +0.3 V Enable, disable inputs . . . . . . . . . . . . . . . GND −0.3V to V_DD +0.3 V Input low voltage (CMOS) . . . . . . . . . . . . . . GND to 1 V Input high voltage (CMOS) . . . . . . . . . . . . . . V_DD −1.0 V to V_DD Input low voltage (TTL) . . . . . . . . . . . . . . . 0.8 V Input high voltage (TTL) . . . . . . . . . . . . . . 2.8 V Ambient operating temperature range (T_A) . . . . . . . −55°C to +125°C Radiation features: Total dose . . . . . . . . . . . . . . . . . . . . . > 100 Krads (Si) Latch up . . . . . . . . . . . . . . . . . . . . . None 4/ Single event phenomenon (SEP) effective linear energy threshold, no upsets (see 4.4.4.3) . . 3/, 4/

intended Use: