scope:

This specification covers the detail requirements for monolithic silicon, CMOS logic microcircuits. Two product assurance classes and a choice of case outlines and lead finishes are provided and are reflected in the complete part number.

The complete part number shall be in accordance with MIL-M-38510.

The device type shall be as follows:

Device type Circuit 01 and 03 Inverting Hex Buffer 02 and 04 Noninverting Hex Buffer 05 Quad True/Complement Buffer 51 and 53 Inverting Hex Buffer 52 and 54 Noninverting Hex Buffer 55 Quad True/Complement Buffer

The device class shall be the product assurance level as defined in MIL-M-38510.

The case outline shall be designated as follows:

Outline letter Case outline, (see MIL-M-38510, appendix C) A F-1 (14-lead, ¼" × ¼", flat-package) C D-1 (14-lead, ¼" × ¾", dual-in-line package) D F-2 (14-lead, ¼" × ⅜", flat-package) E D-2 (16-lead, ¼" × ⅞", dual-in-line package) F F-5 (16-lead, ¼" × ⅜", flat-package) X F-1 (14-lead, ¼" × ¼", flat-package) except dimension "A" = 0.1 (2.54 mm) maximum Y F-2 (14-lead, ¼" × ⅜", flat-package) except dimension "A" = 0.1 (2.54 mm) maximum Z F-5 (16-lead, ¼" × ⅜", flat-package) except dimension "A" = 0.1 (2.54 mm) maximum

NOTES

1. As an exception to 3.5.6.2,3 of MIL-M-38510, for case outlines X, Y and Z only, the leads of bottom brazed ceramic packages (i.e. configuration 2 of case outlines F-l, F-2, or F-5) may have electroless nickel undercoating which shall be 50 to 200 microinches (1.27 to 5.08 µm) thick provided the lead finish is hot solder dip (i.e. finish letter A) and provided that, after any lead forming, an additional hot solder dip coating is applied which shall extend from the outer tip of the lead to no more than 0.015 inch (0.38 mm) from the package edge.

2. For bottom or side brazed packages, case outlines X, Y and Z only, the S₁ dimension may go to .000 inch (.00 mm) minimum. Beneficial comments (recommendations, additions, deletions) and any pertinent data which may be of use in improving this document should be addressed to: George C. Marshall Space Flight Center, National Aeronautics and Space Administration, ATTN. EG02 Marshall Space Flight Center, Alabama, 35812 by using the self-addressed Standardization Document Improvement (DD Form 1426) appearing at the end of this document or by letter.

Device types 01 and 02 Supply voltage range V_DD - V_SS): V_CC ≤ V_DD - - - - - - - - - - - - - - - - - −0.5 to +15.5 V Output load capacitance (each output) - - - 200 pF when V_CC > 10 V Input voltage range - - - - - - - - - - - - (V_SS − 0.5 V) ≤V_I ≤(V_DD +0.5 V) Device types 51 and 52 Supply voltage range (V_DD - V_SS): V_CC ≤ V_DD - - - - - - - - - - - - - - - - - −0.5 to +18.0 V Output load capacitance (each output) - - - 200 pF when V_CC > 10 V Input voltage range - - - - - - - - - - - - (V_SS − 0.5 V) ≤V_I ≤(V_DD +0.5 V) Device types 03, 04 and 05 Supply voltage range (V_CC - V_SS) - - - - - - −0.5 to +18.0 V Input voltage range - - - - - - - - - - - - - V_SS − 0.5 V) ≤V_I ≤(V_DD + 0.5 V) Device types 53, 54 and 55 Supply voltage range (V_CC - V_SS) - - - - - - −0.5 to +18.0 V Input voltage range - - - - - - - - - - - - - (V_SS − 0.5 V) ≤V_I ≤(V_DD +0.5 V) All device types Input current (each input) - - - - - - - - - ±10 mA Storage temperature range- - - - - - - - - - −65°C to 175°C Maximum power dissipation, P_D- - - - - - - - 200 mW Lead temperature (soldering 10 seconds) - - 300°C Thermal resistance, junction to case - - - - (See MIL-M-38510, appendix C) Junction temperature - - - - - - - - - - - - T_J= 175°C

Device types 01, 02, 03, 04, and 05 Supply voltage (V_CC or V_DD - V_SS) - - - - - - 4.5 to 12.5 V dc Input low (VIL) voltage range - - - - - - - - 0-0.85 V dc @ V_CC or V_DD = 5 V; 0-2.1 V dc @ V_CC or V_DD = 12.5 V Input high (V_IH) voltage range 1/ - - - - - - 3.95-5.0 V dc @ V_CC or V_DD = 5 V; 10.0-12.5 V dc @ V_CC or V_DD = 12.5 V Device types 51, 52, 53, 54, and 55 Supply voltage (V_CC or V_DD - V_SS) - - - - - - 4.5 to 15.0 V dc Input low (V_IL) voltage range - - - - - - - - 0-1.5 V dc @ V_CC or V_DD = 5 V; 0-2.0 V dc @ V_CC or V_DD = 10 V; 0-4.0 V dc @ V_CC or V_DD = 15.0 V; V_0L = 10% V_DD or V_CC; V_0H = 90% V_DD or V_CC Input high (V_IH) voltage range 1/ - - - - - - 3.5-5.0 V dc @ V_CC or V_DD = 5 V; 8.0-10.0 V dc @ V_CC or V_DD = 10 V; 11.0-15.0 V dc @ V_CC or V_DD = 15 V; V_OL = 10% V_DD or V_CC; V_OH = 90% V_DD or V_CC Case operating temperature range - - - - - - −55°C to 125°C Load capacitance - - - - - - - - - - - - - - 50 pF maximum

intended Use:

Microcircuits conforming to this specification are intended for original equipment design application and logistic support of existing equipment.