DLA - SMD-5962-85517
MICROCIRCUIT, DIGITAL, COUNTER/TIMER AND PARALLEL I/O UNIT, N-CHANNEL, MONOLITHIC SILICON GATE
inactive
| Organization: | DLA |
| Publication Date: | 14 May 1986 |
| Status: | inactive |
| Page Count: | 29 |
Document History
December 12, 2019
MICROCIRCUIT, DIGITAL, COUNTER/TIMER AND PARALLEL I/O UNIT, N-CHANNEL, MONOLITHIC SILICON GATE
Scope.
This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A.
April 23, 2013
MICROCIRCUIT, DIGITAL, COUNTER/TIMER AND PARALLEL I/O UNIT, N-CHANNEL, MONOLITHIC SILICON GATE
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
April 6, 2005
MICROCIRCUIT, DIGITAL, COUNTER/TIMER AND PARALLEL I/O UNIT, N-CHANNEL, MONOLITHIC SILICON GATE
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
SMD-5962-85517
May 14, 1986
MICROCIRCUIT, DIGITAL, COUNTER/TIMER AND PARALLEL I/O UNIT, N-CHANNEL, MONOLITHIC SILICON GATE
A description is not available for this item.