DLA - SMD-5962-88669 REV D
MICROCIRCUIT, DIGITAL, CMOS, 2K X 9 FIRST-IN, FIRST-OUT (FIFO), MONOLITHIC SILICON
| Organization: | DLA |
| Publication Date: | 25 February 1997 |
| Status: | inactive |
| Page Count: | 24 |
scope:
This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A.
The complete PIN shall be as shown in the following example:
The device type(s) shall identify the circuit function as follows:
Device type Generic number Circuit function Access time 01 See 6.6 2048 × 9 FIFO 80 ns 02 See 6.6 2048 × 9 FIFO 65 ns 03 See 6.6 2048 × 9 FIFO 50 ns 04 See 6.6 2048 × 9 FIFO 40 ns 05 See 6.6 2048 × 9 FIFO 30 ns 06 See 6.6 2048 × 9 FIFO 20 ns 07 See 6.6 2048 × 9 FIFO 25 ns
The case outlines shall be as designated in MIL-STD-1835 and as follows:
Outline letter Descriptive designator Terminals Package style X GDIP1-T28 or CDIP2-T28 28 Dual-in-fine package Y CDIP3-T28 or GDIP4-T28 28 Dual-in-fine package Z CQCC1-N32 32 Rectangular leadless chip carrier U GDFP2-F28 28 Flat package
Supply voltage range ....................
Supply voltage range (VCC) ....................
intended Use:
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
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