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DLA - SMD-5962-91585

MICROCIRCUIT, MEMORY, CMOS, 1K X 9 PARALLEL FIFO, MONOLITHIC SILICON

inactive
Organization: DLA
Publication Date: 8 October 1993
Status: inactive
Page Count: 28
scope:

This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes B, Q, and M) and space application (device classes S and V) and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class N microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices'. When available, a choice of radiation hardness assurance (RHA) levels are reflected in the PIN.

The PIN shall be as shown in the following example:

Device classes M, B, and S RHA marked devices shall meet the MIL-M-38510 specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-I-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device types shall identify the circuit function as follows:

Device type Generic number 1/ Circuit function Access time 01 1K × 9 FIFO 120 ns 02 1K × 9 FIFO 80 ns 03 1K × 9 FIFO 65 ns 04 1K × 9 FIFO 50 ns 05 1K × 9 FIFO 40 ns 06 1K × 9 FIFO 30 ns

The device class designator shall be a single letter identifying the product assurance level see 6.6 herein) as follows:

Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 B or S Certification and qualification to MIL-M-38510 Q or V Certification and qualification to MIL-I-38535

The case outline(s) shall be as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style X CDIP3-T28 or GDIP4-T28 28 Dual-in-line package Y CDIP2-T28 or GDIPl-T28 28 Dual-in-line package Z GDFP2-F28 28 Flat pack U CQCCl-N32 32 Rectangular chip carrier

The lead finish shall be as specified in MIL-M-38510 for classes M, B, and S or MIL-I-38535 for classes Q and V. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X' designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference.

Supply voltage range to ground potential (VCC) - - - - - −0.5 V dc to +7.0 V dc DC voltage range applied to Outputs in High Z state - - −0.5 V dc to +7.0 V dc DC input voltage range (VIN) - - - - - - - - - - - - - - −3.0 V dc to +7.0 V dc DC output current - - - - - - - - - - - - - - - - - - - 20 mA Maximum power dissipation - - - - - - - - - - - - - - - 1.0 W Lead temperature (soldering, 10 seconds) - - - - - - - - +260°C Thermal resistance, junction-to-case (θJC) - - - - - - - See MIL-STD-1835 Junction temperature (TJ) - - - - - - - - - - - - - - - +175°C Storage temperature range (TSTG) - - - - - - - - - - - - −65°C to +150°C Temperature under bias - - - - - - - - - - - - - - - - - −55°C to +125°C

Supply voltage (VCC) - - - - - - - - - - - - - - - - - - +4.5 V dc minimum to +5.5 V dc maximum Ground voltage (GND) - - - - - - - - - - - - - - - - - - 0 V dc Input high voltage.(VIH) - - - - - - - - - - - - - - - - 2.2 V dc minimum Input low voltage (VIL) - - - - - - - - - - - - - - - - 0.8 V dc maximum Case operating temperature range (TC)- - - - - - - - - - −55°C to +125°C

Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) - - - - - - 3/ percent

intended Use:

Microcircuits conforming to this drawing are intended for use for government microcircuit applications (original equipment), design applications, and logistics purposes.

Microcircuits... View More

Document History

November 1, 2021
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 1K X 9 PARALLEL FIFO, MONOLITHIC SILICON
Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q and M) and space application (device class V). A choice of case outlines and lead...
May 5, 2015
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 1K X 9 PARALLEL FIFO, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device class Q and M) and space application (device class V). A choice of case outlines and lead finishes are...
September 26, 2006
MICROCIRCUIT, MEMORY, CMOS, 1K X 9 PARALLEL FIFO, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...
February 26, 2001
MICROCIRCUIT, MEMORY, CMOS, 1K X 9 PARALLEL FIFO, MONOLITHIC SILICON
A description is not available for this item.
September 30, 1994
MICROCIRCUIT, MEMORY, CMOS, 1K X 9 PARALLEL FIFO, MONOLITHIC SILICON
A description is not available for this item.
SMD-5962-91585
October 8, 1993
MICROCIRCUIT, MEMORY, CMOS, 1K X 9 PARALLEL FIFO, MONOLITHIC SILICON
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes B, Q, and M) and...
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