scope:

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

The PIN is as shown in the following examples.

For device classes M and Q:

For device class V:

Device classes Q and V RHA marked devices meet the MIL-PRF-38635 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type(s) identify the circuit function as follows:

Device type Generic number Circuit function 01 54ACTQ273 Octal D type flip-flop with reset, TTL compatible inputs

The device class designator is a single letter identifying the product assurance level as listed below. Since the device class designator has been added after the original issuance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the device.

Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535

The case outline(s) are as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line package S GDFP2-F20 or CDFP3-T20 20 Flat package 2 CQCC1-N20 20 Square chip carrier package

The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M.

Supply voltage range (V_CC) ............................. −0.5 V dc to +6.0 V dc DC input voltage range (V_IN) ........................... −0.5 V dc to V_CC +0.5 V dc DC output voltage range (V_OUT) ......................... −0.5 V dc to V_CC +0.5 V dc DC input diode current ................................. ±20 mA DC output diode current (per output pin) ................ ±50 mA DC output source or sink current (per output pin) ....... ±50 mA DC V_CC or GND current ................................... ±100 mA Storage temperature range .............................. −65°C to +150°C Maximum power dissipation (P_D) .......................... 500 mW Lead temperature (soldering, 10 seconds) ................ +300°C Thermal resistance, junction-to-case (Θ_JC) .............. See MIL-STD-1835 Junction temperature (T_J) .............................. +175°C 4/

Supply voltage range (V_CC) .............................. +4.5 V dc to +5.5 V dc Input voltage range (V_IN) ............................... 0.0 V dc to V_CC Output voltage range (V_OUT) ............................. 0.0 V dc to V_CC Case operating temperature range (T_C) ................... −55° C to +125° C Maximum input rise and fall rate (Δt/ΔV) ................ 8 ns/V Maximum high level output current (I_OH) ................. −24 mA Maximum low level output current (I_OL) .................. +24 mA Maximum clock frequency (f_max): T_C = +25° C: V_CC = 4.5 V to 5.5 V, ................................. 95 MHz T_C = −55° C, +125° C: V_CC = 4.5 V to 5.5 V, ................................. 85 Mhz Maximum setup time, Dn to CP (t_s): T_C = +25° C: V_CC = 4.5 V to 5.5 V, ................................. 5.0 ns T_C = −55° C, +125°C: V_CC = 4.5 V to 5.5 V, ................................. 5.0 ns Maximum hold time, Dn to CP (t_h): T_C = +25° C: V_CC = 4.5 V to 5.5 V, ................................. 2.0 ns T_C = −55° C, +125° C: V_CC = 4.5 V to 5.5 V, ................................. 2.0 ns

Maximum clock high, low pulse width (t_w1): T_C = +25° C: V_CC = 4.5 V to 5.5 V, .................... 5.0 ns T_C = −55° C, +125° C: V_CC = 4.5 V to 5.5 V, .................... 5.0 ns Maximum pulse width, [M bar][R bar] low (t_w2): T_C = +25° C: V_CC = 4.5 V to 5.5 V, .................... 5.0 ns T_C = −55° C, +125° C: V_CC = 4.5 V to 5.5 V, .................... 5.0 ns Maximum removal time, [M bar][R bar] to clock (t_rem): T_C = +25° C: V_CC = 4.5 V to 5.5 V, .................... 4.0 ns T_C = −55° C, +125° C: V_CC = 4.5 V to 5.5 V, .................... 4.0 ns

Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) XX percent 5/

intended Use: