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DLA - SMD-5962-95822

MICROCIRCUIT, MEMORY, DIGITAL, RADIATION- HARDENED, CMOS/SOS, 64K X 1-BIT STATIC RAM, MONOLITHIC SILICON

inactive
Organization: DLA
Publication Date: 2 October 1997
Status: inactive
Page Count: 21
scope:

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

The PIN is as shown in the following example:

Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type shall identify the circuit function as follows:

Device type Generic number 1/ Circuit function Access time 01 65643ARH 64K × 1 Radiation hardened CMOS/SOS static RAM 50 ns

The device class designator shall be a single letter identifying the product assurance level as follows:

Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535

The case outlines are as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style X See figure 1 24 Flat pack

The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M.

Supply voltage range ......................................... −0.5 V to +7.0 V dc Input, output, or I/O voltage ................................ −0.3 V dc to VDD +0.3 V dc Maximum package power dissipation (PD) at TA = +125°C Case X ...................................................... 0.78 W 3/ Lead temperature (soldering, 10 seconds maximum) ............. +300°C Thermal resistance, junction-to-case (ΘJC): Case X ...................................................... 8.8°C/W Thermal resistance, junction-to-ambient (ΘJA): Case X ...................................................... 64.0°C/W Junction temperature (TJ) .................................... +175°C Storage temperature range .................................... −65°C to +150°C

Supply voltage (VDD) ........................................ +4.5 V dc to +5.5 V dc Ground voltage (GND) ......................................... 0.0 V dc Input high voltage (VIH) ..................................... 0.8VDD to VDD Input Low voltage (VIL) ..................................... 0.0 V dc to 0.2VDD Case operating temperature range (TC) ........................ −55°C to +125°C Data retention supply voltage ................................ 2.0 V dc minimum Input rise and fall time .................................... 5 ns maximum Radiation features: Total dose irradiation ..................................... ≥ 300 KRads(Si) Dose rate upset (20 ns pulse) .............................. ≥ 1 × 1011 Rads(Si)/sec 4/ Dose rate survivability ..................................... ≥ 1 × 1012 Rads(Si)/sec 4/ Single event phenomenon (SEP) effective linear energy threshold (LET) with no upsets .............. ≥ 100 MeV/(cm2/mg) 4/ Latchup ..................................................... None 4/ Cosmic ray upset immunity ................................... < 1 × 10−10 errors/bit-day 4/ 5/

intended Use:

Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.

Microcircuits... View More

Document History

January 29, 2024
MICROCIRCUIT, MEMORY, DIGITAL, CMOS/SOS, RADIATION HARDENED, 64K X 1 STATIC RAM, MONOLITHIC SILICON
Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V). A choice of case outlines and lead finishes...
August 21, 2013
MICROCIRCUIT, MEMORY, DIGITAL, CMOS/SOS, RADIATION HARDENED, 64K X 1 STATIC RAM, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V). A choice of case outlines and lead finishes are...
October 2, 1998
MICROCIRCUIT, MEMORY, DIGITAL, RADIATION- HARDENED, CMOS/SOS, 64K X 1-BIT STATIC RAM, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...
SMD-5962-95822
October 2, 1997
MICROCIRCUIT, MEMORY, DIGITAL, RADIATION- HARDENED, CMOS/SOS, 64K X 1-BIT STATIC RAM, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...

References

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