JEDEC JESD 22-B108
Coplanarity Test for Surface-Mount Semiconductor Devices
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| Organization: | JEDEC |
| Publication Date: | 1 September 2010 |
| Status: | active |
| Page Count: | 14 |
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The purpose of this test is to measure the deviation of the terminals (leads or solder balls) from coplanarity at room temperature for surface-mount semiconductor devices. This test method is applicable for inspection and device characterization. If package warpage or coplanarity is to be characterized at reflow soldering temperatures, then JESD22-B112 should be used.
Document History
JEDEC JESD 22-B108
September 1, 2010
Coplanarity Test for Surface-Mount Semiconductor Devices
The purpose of this test is to measure the deviation of the terminals (leads or solder balls) from coplanarity at room temperature for surface-mount semiconductor devices. This test method is...
January 1, 2003
Coplanarity Test for Surface-Mount Semiconductor Devices
The purpose of this test is to measure the deviation of the terminals (leads or solder balls) from coplanarity for surface-mount semiconductor devices.
January 1, 1991
Coplanarity Test for Surface-Mount Semiconductor Devices
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