IEC TR 61189-5-506
Test methods for electrical materials, printed boards and other interconnection structures and assemblies – Part 5-506: General test methods for materials and assemblies – An intercomparison evaluation to implement the use of fine-pitch test structures for surface insulation resistance (SIR) testing of solder fluxes in accordance with IEC 61189-5-501
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| Organization: | IEC |
| Publication Date: | 1 June 2019 |
| Status: | active |
| Page Count: | 28 |
| ICS Code (Printed circuits and boards): | 31.180 |
scope:
This Technical Report is an intercomparison supporting the development of IEC 61189-5-501 in relation to the SIR method. This document sets out to validate the introduction of a new 200-μm gap SIR pattern, and was benched marked against existing SIR gap patterns of 318 μm and 500 μm.
Document History
IEC TR 61189-5-506
June 1, 2019
Test methods for electrical materials, printed boards and other interconnection structures and assemblies – Part 5-506: General test methods for materials and assemblies – An intercomparison evaluation to implement the use of fine-pitch test structures for surface insulation resistance (SIR) testing of solder fluxes in accordance with IEC 61189-5-501
This Technical Report is an intercomparison supporting the development of IEC 61189-5-501 in relation to the SIR method. This document sets out to validate the introduction of a new 200-μm gap SIR...