DLA - DSCC-VID-V62/16601 REV B
MICROCIRCUIT, LINEAR-DIGITAL, COMPLETE DDR2, DDR3 AND DDR3L MEMORY POWER SOLUTION SYNCHRONOUS BUS CONTROLLER, 2-A LDO, BUFFERED REFERENCE, MONOLITHIC SILICON
active, Most Current
| Organization: | DLA |
| Publication Date: | 15 December 2021 |
| Status: | active |
| Page Count: | 14 |
scope:
Scope.
This drawing documents the general requirements of a high performance complete double data rate (DDR2), DDR3 and double data rate low voltage DDR3L memory power solution synchronous bus controller, 2 amp (A) low drop out (LDO), buffered reference microcircuit, with an operating temperature range of -55ºC to +125ºC.
Document History
DSCC-VID-V62/16601 REV B
December 15, 2021
MICROCIRCUIT, LINEAR-DIGITAL, COMPLETE DDR2, DDR3 AND DDR3L MEMORY POWER SOLUTION SYNCHRONOUS BUS CONTROLLER, 2-A LDO, BUFFERED REFERENCE, MONOLITHIC SILICON
Scope.
This drawing documents the general requirements of a high performance complete double data rate (DDR2), DDR3 and double data rate low voltage DDR3L memory power solution synchronous bus...
December 8, 2015
MICROCIRCUIT, LINEAR-DIGITAL, COMPLETE DDR2, DDR3 AND DDR3L MEMORY POWER SOLUTION SYNCHRONOUS BUS CONTROLLER, 2-A LDO, BUFFERED REFERENCE, MONOLITHIC SILICON
This drawing documents the general requirements of a high performance complete DDR2, DDR3 and DDR3L memory Power Solution Synchronous Bus Controller, 2-A LDO, Buffered Reference microcircuit, with an...
November 24, 2015
MICROCIRCUIT, LINEAR-DIGITAL, COMPLETE DDR2, DDR3 AND DDR3L MEMORY POWER SOLUTION SYNCHRONOUS BUS CONTROLLER, 2-A LDO, BUFFERED REFERENCE, MONOLITHIC SILICON
This drawing documents the general requirements of a high performance complete DDR2, DDR3 and DDR3L memory Power Solution Synchronous Bus Controller, 2-A LDO, Buffered Reference microcircuit, with an...