IEEE 1149.1
Test Access Port and Boundary-Scan Architecture
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| Organization: | IEEE |
| Publication Date: | 6 February 2013 |
| Status: | active |
| Page Count: | 208 |
scope:
This standard defines test logic that can be included in an integrated circuit to provide standardized approaches to:
- Testing the interconnections between integrated circuits once they have been assembled onto a printed circuit board or other substrate
- Testing the integrated circuit itself
- Observing or modifying circuit activity during the component's normal operation
The test logic consists of a boundary-scan register and other building blocks and is accessed through a test access port (TAP).
Document History
IEEE 1149.1
February 6, 2013
Test Access Port and Boundary-Scan Architecture
This standard defines test logic that can be included in an integrated circuit to provide standardized approaches to:
- Testing the interconnections between integrated circuits once they have been...
June 14, 2001
Standard Test Access Port and Boundary-Scan Architecture
This standard defines test logic that can be included in an integrated circuit to provide standardized approaches to
— testing the interconnections between integrated circuits once they have been...
August 19, 1996
Test Access Port andBoundary-Scan Architecture
A description is not available for this item.
January 1, 1994
Supplement to IEEE Std 1149.1-1990, Standard Test Access Port and Boundary-Scan Architecture
A description is not available for this item.
May 21, 1990
Standard Test Access Port and Boundary-Scan Architecture
A description is not available for this item.