Test Access Port and Boundary-Scan Architecture
|Publication Date:||6 February 2013|
This standard defines test logic that can be included in an integrated circuit to provide standardized approaches to:
- Testing the interconnections between integrated circuits once they have been assembled onto a printed circuit board or other substrate
- Testing the integrated circuit itself
- Observing or modifying circuit activity during the component's normal operation
The test logic consists of a boundary-scan register and other building blocks and is accessed through a test access port (TAP).