scope:

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

The PIN is as shown in the following example:

Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash(-) indicates a non-RHA device.

The Device type(s) identify the circuit function as follows:

Device type Generic number Circuit function 01 68332 1/ 32-bit integrated microcontroller 02 68332-20 1/ 32-bit integrated microcontroller

The device class designator is a single letter identifying the product assurance level as follows:

Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535

The case outline(s) are as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style Z CMGA5-P132 132 Pin grid array Y See figure 1 132 Gull wing leaded chip carrier X See figure 1 132 Gull wing leaded chip carrier

The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M.

Storage temperature range (T_STG) ..................................................... −55°c to +150°C Supply voltage range 1/2/3/ .......................................................... −0.3 Vdc to +6.5 Vdc Input voltage range (V_IN) 1/2/3/4/ ................................................... −0.3 V dc to +6.5 V dc Instantaneous maximum current single pin limit (applies to all pins) 1/2/3/5/ ........ 25 mA Power dissipation (P_D) ............................................................... 690 mW Operating maximum current digital input disruptive current range V_SS −0.3 ≤ V_IN ≤ V_DD + 0.3 5/6/7/...................................................... −500 to +500µA Thermal resistance, junction-to-case(θ_JC) Case Z ............................................................................. 10°C/W Case X, Y .......................................................................... 10°C/W Lead temperature range (soldering, 5 seconds) ........................................ 270°C

Case operating temperature range...................................................... −55°C to +125°C Supply voltage range ................................................................. 4.50 V dc ≤ V_CC ≤ 5.50 V dc PLL reference frequency range (f_REF) ................................................. 25 to 50 KHz System frequency 8/ device 01 ........................................................................... 16.78 MHz device 02 ........................................................................... 20.97 MHz On-chip PLL system frequency (f_SYS) device 01 ........................................................................... 0.131 ≤ f_SYS ≤ = 16.78 MHz device 02 ........................................................................... 0.331 ≤ f_SYS ≤ = 20.97 MHz External clock operation device 01 ............. .............................................................. 16.78 MHz device 02 ........................................................................... 20.97 MHz PLL lock time (t_LPLL) 9/ ............................................................. 20 ms Limp mode clock frequency (f_LIMP):10/ SYNCR X bit = 0 ...................................................................... f_SYS max/2 MHz SYNCR X bit = 1 ...................................................................... f_SYS max MHz CLKOUT stability (C_STAB) 11/12/ Short term ........................................................................... −1.0 to + 1.0% Long term ............................................................................ −0.5 to + 0.5%

Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) ........................................ XX percent 13/

intended Use: