JEDEC - JESD403-1A
JEDEC Module Sideband Bus (SidebandBus)
inactive
| Organization: | JEDEC |
| Publication Date: | 1 December 2021 |
| Status: | inactive |
| Page Count: | 60 |
scope:
This standard defines the assumptions for the system management bus for next generation memory solutions; covering the interface protocol, use of hub devices, and voltages appropriate to these usages.
Document History
December 1, 2023
JEDEC Module Sideband Bus (SidebandBus)
This standard defines the assumptions for the system management bus for next generation memory solutions; covering the interface protocol, use of hub devices, and voltages appropriate to these usages.
JESD403-1A
December 1, 2021
JEDEC Module Sideband Bus (SidebandBus)
This standard defines the assumptions for the system management bus for next generation memory solutions; covering the interface protocol, use of hub devices, and voltages appropriate to these usages.