UNLIMITED FREE
ACCESS
TO THE WORLD'S BEST IDEAS

SUBMIT
Already a GlobalSpec user? Log in.

This is embarrasing...

An error occurred while processing the form. Please try again in a few minutes.

Customize Your GlobalSpec Experience

Finish!
Privacy Policy

This is embarrasing...

An error occurred while processing the form. Please try again in a few minutes.

JEDEC - JEP195

Guideline for Evaluating Gate Switching Instability of Silicon Carbide Metal-Oxide-Semiconductor Devices for Power Electronic Conversion

active, Most Current
Organization: JEDEC
Publication Date: 1 February 2023
Status: active
Page Count: 22
scope:

The scope of this document covers SiC-based PECS having a gate dielectric region biased to turn devices on and off. This document should enable the reader to evaluate the consequences of SiC MOSFET specific parametric drift mechanism called "gate switching instability" for the device and/or the application. Additionally, the gate switching stress (GSS) test is described, enabling the calculation/measurement of the worst-case drift that has to be anticipated until the end of the application profile.

Document History

JEP195
February 1, 2023
Guideline for Evaluating Gate Switching Instability of Silicon Carbide Metal-Oxide-Semiconductor Devices for Power Electronic Conversion
The scope of this document covers SiC-based PECS having a gate dielectric region biased to turn devices on and off. This document should enable the reader to evaluate the consequences of SiC MOSFET...

References

Advertisement