UNLIMITED FREE
ACCESS TO THE WORLD'S BEST IDEAS

SUBMIT
Already a GlobalSpec user? Log in.

This is embarrasing...

An error occurred while processing the form. Please try again in a few minutes.

Customize Your GlobalSpec Experience

Select Your Free Newsletters

Industry Newsletters

Select Your Free Product Alerts

Finish!
Privacy Policy

This is embarrasing...

An error occurred while processing the form. Please try again in a few minutes.

DLA - DSCC-VID-V62/12605

MICROCIRCUIT, DIGITAL SIGNAL PROCESSOR, MONOLITHIC SILICON

inactive
Organization: DLA
Publication Date: 13 August 2013
Status: inactive
Page Count: 85
scope:

This drawing documents the general requirements of a high performance digital processor microcircuit, with an operating temperature range of -55°C to +125°C.

Document History

DSCC-VID-V62/12605 REV A
November 25, 2014
MICROCIRCUIT, DIGITAL SIGNAL PROCESSOR, MONOLITHIC SILICON
This drawing documents the general requirements of a high performance digital processor microcircuit, with an operating temperature range of -55°C to +125°C.
DSCC-VID-V62/12605
August 13, 2013
MICROCIRCUIT, DIGITAL SIGNAL PROCESSOR, MONOLITHIC SILICON
This drawing documents the general requirements of a high performance digital processor microcircuit, with an operating temperature range of -55°C to +125°C.

References

This document references:
JEP95 BOOK 1 - Book One Registered and Standard Outlines for Solid State and Related Products
Published by JEDEC on March 1, 1997
PREFACE This Publication contains those solid state product outlines and other associated drawings that have been registered and assigned a JEDEC designation and are printed on white paper. Product...
This document references:
JEDEC JESD 51-2 - Integrated Circuits Thermal Test Method Environmental Conditions - Natural Convection (Still Air)
Published by JEDEC on January 1, 2008
This document outlines the environmental conditions necessary to ensure accuracy and repeatability for a standard junction-to-ambient thermal resistance measurement in natural convection.
This document references:
JEDEC JESD 51-7 - High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages
Published by JEDEC on February 1, 1999
This fixturing further defines the environment for thermal test of packaged microelectronic devices. Its function is to provide an alternate mounting surface for the analysis of heat flow in...
This document references:
JEDEC JESD 22-A117 - Electrically Erasable Programmable ROM (EEPROM) Program / Erase Endurance and Data Retention Stress Test
Published by JEDEC on November 1, 2018
This standard specifies the procedural requirements for performing valid endurance, retention and crosstemperature tests based on a qualification specification. Endurance and retention qualification...
This document references:
JEDEC JEP 155 - Recommended ESD Target Level for HBM Qualification
Published by JEDEC on July 1, 2018
The intent of this report is to document and provide critical information to assess and make decisions on safe ESD level requirements. The scope of this document is to provide this information to...
This document references:
JEDEC JESD 79-2 - DDR2 SDRAM SPECIFICATION
Published by JEDEC on November 1, 2009
This document defines the DDR2 SDRAM specification, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments. The purpose of this Specification is to...
View Less
View All
Advertisement