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DLA - SMD-5962-93189 REV A

MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 4K X 18 PARALLEL SYNCHRONOUS FIFO, MONOLITHIC SILICON

inactive
Organization: DLA
Publication Date: 31 August 1994
Status: inactive
Page Count: 34
scope:

This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes Q and M) and space application (device class V), and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

The PIN shall be as shown in the following example:

Device class M RHA marked devices shall meet the MIL-I-38535 appendix A specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-I-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type(s) shall identify the circuit function as follows:

Clock cycle Device type Generic number 1/ Circuit function time (min) 01 4K × 18 CMOS Parallel synchronous FIFO 50 ns 02 4K × 18 CMOS Parallel synchronous FIFO 35 ns 03 4K × 18 CMOS Parallel synchronous FIFO 25 ns

The device class designator shall be a single letter identifying the product assurance level (see 6.6 herein) as follows:

Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 Q or V Certification and qualification to MIL-I-38535

The case outline shall be as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminal Package style X CMGA3-PN 68 2/ Pin grid array Y See figure 1 68 Flat package

The lead finish shall be as specified in MIL-STD-883 (see 3.1 herein) for class M or MIL-I-38535 for classes Q and V. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference.

Terminal voltage with respect to ground - - - - - - - - - - - - - - −0.5 V dc to +7.0 V dc DC output current - - - - - - - - - - - - - - - - - - - - - - - - - 50 mA Storage temperature range - - - - - - - - - - - - - - - - - - - - - −65°C to +150°C Maximum power dissipation (PD) - - - - - - - - - - - - - - - - - - 1.25 W Lead temperature (soldering, 10 seconds)- - - - - - - - - - - - - - +260°C Thermal resistance, junction-to-case (θJC): Case X- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - See MIL-STD-1835 Case Y- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 10 °C/W Junction temperature (TJ) - - - - - - - - - - - - - - - - - - - - - +175°C

Supply voltage (VCC)- - - - - - - - - - - - - - - - - - - - - - - - 4.5 V dc to 5.5 V dc Supply voltage (GND)- - - - - - - - - - - - - - - - - - - - - - - - 0 V Input high voltage (VIH)- - - - - - - - - - - - - - - - - - - - - - - - 2.2 V dc minimum Input low voltage (VIL) - - - - - - - - - - - - - - - - - - - - - - - - 0.8 V dc maximum 4/ Case operating temperature range (TC) - - - - - - - - - - - - - - - −55°C to +125°C

Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) - - - - - - - - - XX percent 5/

intended Use:

Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.

Microcircuits... View More

Document History

April 4, 2023
MICROCIRCUIT, MEMORY, CMOS, 4K X 18 PARALLEL SYNCHRONOUS, FIFO, MONOLITHIC SILICON
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. Replaceability....
March 25, 2013
MICROCIRCUIT, MEMORY, CMOS, 4K X 18 PARALLEL SYNCHRONOUS, FIFO, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...
August 2, 1995
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 4K X 18 PARALLEL SYNCHRONOUS FIFO, MONOLITHIC SILICON
A description is not available for this item.
January 11, 1995
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 4K X 18 PARALLEL SYNCHRONOUS FIFO, MONOLITHIC SILICON
A description is not available for this item.
SMD-5962-93189 REV A
August 31, 1994
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 4K X 18 PARALLEL SYNCHRONOUS FIFO, MONOLITHIC SILICON
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes Q and M) and...
June 15, 1993
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 4K X 18 PARALLEL SYNCHRONOUS FIFO, MONOLITHIC SILICON
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes B, Q, and M) and...

References

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