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DLA - SMD-5962-91611

MICROCIRCUITS, DIGITAL, ADVANCED CMOS, 8-BIT D FLIP-FLOP, POSITIVE EDGE-TRIGGERED WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON

inactive
Organization: DLA
Publication Date: 1 November 1991
Status: inactive
Page Count: 18
scope:

This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes B, Q, and M) and space application (device classes S and V), and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". When available, a choice of radiation hardness assurance (RHA) levels are reflected in the PIN.

The PIN shall be as shown in the following example:

Device classes M, B, and S RHA marked devices shall meet the MIL-M-38510 specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA marked devices shall maet the MIL-I-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type(s) shall identify the circuit function as follows:

Device type Generic number Circuit function 01 54ACT825 8-bit D flip-flop, TTL compatible inputs positive edge triggered, three-state outputs

The device class designator shall be a single letter identifying the product asurance level as follows:

Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 B or S Certification and qualification to MIL-M-38510 Q or V Certification and qualification to MIL-I-38535

For device classes M, B, and S, case outline(s) shall meet the requirements in appendix C of MIL-M-38510 and as listed below. For device classes Q and V, case outline(s) shall meet the requirements of MIL-I-38535, appendix C of MIL-M-38510, and as listed below.

Outline letter Case outline K F-6 (24-lead, .640" × .420" × .090"), flat package. L D-9 (24-lead 1.280" × .310" × .200"), dual-in-line package 3 C-4 (28-leed, .460" × .460" × .100"), square chip carrier package

The lead finish shall be as specified in MIL-M-8510 for classes H, B, and S or MIL-I-38535 for classes Q and V. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference.

Supply voltage range - - - - - - - - - - - - - - -- - - −0.5 V dc to +7.0 V dc DC input voltage range - - - - - - - - - - - - - -- - - −0.5 V dc to VCC + 0.5 V dc DC output voltage range- - - - - - - - - - - - - -- - - −0.5 V dc to VCC + 0.5 V dc DC input diode current - - - - - - - - - - - - - -- - - ±20 mA DC output diode current (per output pin) - - - - -- - - ±50 mA DC output source or sink current (per output pin)-- - - ±50mA DC VCC or GND current - - - - - - - - - - - - - - -- - - ±50mA Storage temperature range- - - - - - - - - - - - -- - - −65°C to +150°C Maximum power dissipation (PD) - - - - - - - - - -- - - 500 mW Lead temperature (soldering, 10 seconds) - - - - -- - - +300°C Thermal resistance, junction-to-case (θJC) - - - - - - See MIL-M-38510, appendix C Junction temperature (TJ) 2/- - - - - - - - - - - - - - +175°C

Supply voltage range (VCC) - - - - - - - - - - - - - 4.5 V dc to 5.5 V dc Input voltage range - - - - - - - - - - - - - - - - 0.0 V dc to .VCC Output voltage range - - - - - - - - - - - - - - - - 0.0 V dc to VCC Case operating temperature range (TC)- - - - - - - - −55°C to +125°C Input rise or fall times: VCC = 4.5 V to 5.5 V- - - - - - - - - - - - - - - - 0 to 8 ns/V Minimum setup time, data (Dn) to clock (CP) (ts1): TC = +25°C, V = 4.5 V- - - - - - - - - - - - - - - 3.5 ns TC = −55°C, +125°C, VCC = 4.5 V- - - - - - - - - - 4.0 ns Minimum setup time, enable ([E bar][N bar]) to CP (ts2): TC = +25°C, VCC = 4.5 V- - - - - - - - - - - - - - 3.5 ns TC = −55°C, +125°C, VCC = 4.5 V- - - - - - - - - - 4.0 ns Minimum hold time, Dn t CP (th1): TC = +25°C, VCC = 4.5 V- - - - - - - - - - - - - - 2.5 ns TC = −55°C, +125°C. VCC = 4.5 V- - - - - - - - - - 2.5 ns Minimum hold time, [E bar][N bar] to CP (th2): TC = +25°C, VCC = 4.5 V- - - - - - - - - - - - - - 1.0 ns TC = −55°C, +125°C, VCC = 4.5 V- - - - - - - - - - 2.0 ns Minimum pulse width, CP high, Low (tw1): TC = +25°C, VCC = 4.5 V- - - - - - - - - - - - - - 6.0 ns TC = −55°C, +125°C, VCC = 4.5 V- - - - - - - - - - 6.0 ns Minimum pulse width, clear (CLR) Low, (tw2): TC = +25°C, VCC = 4.5 V- - - - - - - - - - - - - - 6.0 ns TC = −55°C, +125°C, VCC = 4.5- - - - - - - - - - - 7.0 ns Minimum recovery time, CLR to CP (trec): TC = +25°C, VCC = 4.5 - - - - - - - - - - - - - - 4.0 ns TC = −55°C. +125°C, VCC = 4.5 V- - - - - - - - - - 4.5 ns Maximum clock frequency (fMAX): TC = +25°C, VCC = 4.5 V- - - - - - - - - - - - - - 95 MHz TC = −55°C, +125°C, VCC = 4.5 V - - - - - - - - - 95 MHz

Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) - - - - XX percent 3/

intended Use:

Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.

Microcircuits... View More

Document History

August 12, 2019
MICROCIRCUIT, DIGITAL, ADVANCED CMOS, 8-BIT D FLIP-FLOP, POSITIVE EDGE-TRIGGERED WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device class Q and M) and space application (device class V). A choice of case outlines and lead finishes are...
July 24, 2015
MICROCIRCUIT, DIGITAL, ADVANCED CMOS, 8-BIT D FLIP-FLOP, POSITIVE EDGE-TRIGGERED WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device class Q and M) and space application (device class V). A choice of case outlines and lead finishes are...
March 24, 2009
MICROCIRCUIT, DIGITAL, ADVANCED CMOS, 8-BIT D FLIP-FLOP, POSITIVE EDGE-TRIGGERED WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...
July 18, 2000
MICROCIRCUITS, DIGITAL, ADVANCED CMOS, 8-BIT D FLIP-FLOP, POSITIVE EDGE-TRIGGERED WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. Microcircuits covered by...
SMD-5962-91611
November 1, 1991
MICROCIRCUITS, DIGITAL, ADVANCED CMOS, 8-BIT D FLIP-FLOP, POSITIVE EDGE-TRIGGERED WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes B, Q, and M) and...

References

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