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DLA - SMD-5962-97545

MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 512K X 16-BIT X 2-BANK, SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY (SDRAM), MONOLITHIC SILICON

inactive
Organization: DLA
Publication Date: 17 June 1997
Status: inactive
Page Count: 52
scope:

This drawing documents three product assurance class levels consisting of space application (device class V), high reliability (device Classes M and Q), and nontraditional performance environment (device class N). A choice of case outlines and lead finishes are available and are reflected in the part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. For device class N, the user is cautioned to assure that the device is appropriate for the application environment.

The PIN is as shown in the following example:

Device classes N, Q, and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash ( -) indicates a non-RHA device.

The device type(s) identify the circuit function as follows:

Device type Generic number Circuit function Access time 01 626162-15 524288 word by 16 bit by 2 bank, synchronous 15 ns dynamic random access memory 02 626162-20 524288 word by 16 bit by 2 bank, synchronous 20 ns dynamic random access memory

The device class designator is a single letter identifying the product assurance level as follows:

Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A N Certification and qualification to MIL-PRF-38535 with a nontraditional performance environment 1/ Q or V Certification and qualification to MIL-PRF-38535

The case outline(s) are as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style X See figure 1 50 Ceramic dual flat pack Y See figure 1 50 Plastic TSOP(II) package

The lead finish is as specified in MIL-PRF-38535 for device classes N, Q, and V or MIL-PRF-38535, appendix A for device class M.

Supply voltage range, (VCC)...................................................... −0.5 V dc to +4.6 V dc Supply voltage range for output drivers, (VCCQ).................................. −0.5 V dc to +4.6 V dc Voltage range on any pin ........................................................ −0.5 V dc to +4.6 V dc Short-circuit output current .................................................... 50 mA Power dissipation ............................................................... 1 W Operating free-air temperature range, (TA) ...................................... −55°C to +125°C Storage temperature range, (Tstg)................................................ −65°C to +150°C Junction temperature, (TJ) ...................................................... +175°C Thermal resistance, junction-to-case, (ΘJC): Case X ........................................................................ +5°C/W Case Y ........................................................................ +1°C/W

Supply voltage range, (VCC)...................................................... +3.135 V dc to +3.465 V dc Supply voltage for output drivers, (VCCQ) ....................................... +3.135 V dc to +3.465 V dc Supply voltage, (VSS)............................................................ 0 V dc Supply voltage for output drivers, (VSSQ)........................................ 0 V dc High-level input voltage, (VIH).................................................. +2.0 V dc to +4.6 V dc Low-level input voltage, (VIL)................................................... −0.3 V dc to +0.8 V dc Operating free-air temperature, (TA) ............................................ −55°C to +125°C

Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) ...................................... 100 percent

intended Use:

Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.

Microcircuits... View More

Document History

October 10, 2023
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 512K x 16-BIT x 2-BANK, SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY (SDRAM), MONOLITHIC SILICON
A description is not available for this item.
May 9, 2016
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 512K x 16-BIT x 2-BANK, SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY (SDRAM), MONOLITHIC SILICON
This drawing documents three product assurance class levels consisting of space application (device class V), high reliability (device class Q), and nontraditional performance environment (device...
December 13, 2007
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 512K x 16-BIT x 2-BANK, SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY (SDRAM), MONOLITHIC SILICON
This drawing documents three product assurance class levels consisting of space application (device class V), high reliability (device classes M and Q), and nontraditional performance environment...
April 2, 2002
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 512K X 16-BIT X 2-BANK, SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY (SDRAM), MONOLITHIC SILICON
A description is not available for this item.
March 16, 1999
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 512K X 16-BIT X 2-BANK, SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY (SDRAM), MONOLITHIC SILICON
This drawing documents three product assurance class levels consisting of space application (device class V), high reliability (device classes M and Q), and nontraditional performance environment...
March 19, 1998
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 512K X 16-BIT X 2-BANK, SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY (SDRAM), MONOLITHIC SILICON
A description is not available for this item.
January 20, 1998
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 512K X 16-BIT X 2-BANK, SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY (SDRAM), MONOLITHIC SILICON
This drawing documents three product assurance class levels consisting of space application (device class V), high reliability (device classes M and Q), and nontraditional performance environment...
SMD-5962-97545
June 17, 1997
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 512K X 16-BIT X 2-BANK, SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY (SDRAM), MONOLITHIC SILICON
This drawing documents three product assurance class levels consisting of space application (device class V), high reliability (device Classes M and Q), and nontraditional performance environment...
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