DLA - SMD-5962-91546 REV A
MICROCIRCUIT, MEMORY, DIGITAL, CMOS ONE TIME PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON
| Organization: | DLA |
| Publication Date: | 11 January 1993 |
| Status: | inactive |
| Page Count: | 21 |
scope:
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes B, Q, and M) and space application (device classes S and V) and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". When available, a choice of radiation hardness assurance (RHA) levels are reflected in the PIN.
The PIN shall be as shown in the following example:
Device classes M, B, and S RHA marked devices shall meet the MIL-M-38510 specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-I-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
The device types shall identify the circuit function as follows:
Device type Generic number 1/ Circuit function Access time 01 38-input, 24-output and-or-logic array 35 ns 02 38-input, 24-output and-or-logic array 25 ns 03 38-input, 24-output and-or-logic array, low power 35 ns
The device class designator shall be a single letter identifying the product assurance level as follows:
Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 B or S Certification and qualification to MIL-M-38510 Q or V Certification and qualification to MIL-I-38535
The case outlines shall be as designated in MIL-STD-1835 and as follows:
Outline letter Descriptive designator Terminals Package style Q GDIP1-T40 or CDIP2-T40 40 dual-in-line X CQCC1-N44 44 flat pack Y See figure 1 44 quad cerpac chip carrier package
The lead finish shall be as specified in MIL-M-38510 for classes M, B, and S or MIL-I-38535 for classes Q and V. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference.
Supply voltage range - - - - - - - - - - - - - - - - - - −0.5 V dc to +7.0 V dc Input voltage range - - - - - - - - - - - - - - - - - - −2.0 V dc to +7.0 V dc 4/ Output voltage applied - - - - - - - - - - - - - - - - - −0.5 V dc to +7.0 V dc 4/ Output sink current- - - - - - - - - - - - - - - - - - - 8 mA Thermal resistance, junction-to-case (θJC): Cases Q, X - - - - - - - - - - - - - - - - - - - - - - See MIL-STD-1835 Case Y - - - - - - - - - - - - - - - - - - - - - - - - 20°C/W Maximum power dissipation (PD) 5/ - - - - - - - - - - - 1.2 W Maximum junction temperature - - - - - - - - - - - - - - +175°C Lead temperature (soldering, 10 seconds maximum) - - - - +300°C
Supply voltage (VCC) - - - - - - - - - - - - - - - - - - +4.5 V dc minimum to +5.5 V dc maximum Supply voltage (VSS) - - - - - - - - - - - - - - - - - - 0.0 V dc High level input voltage (VIH) - - - - - - - - - - - - - 2.0 V dc minimum Low level input voltage (VIL) - - - - - - - - - - - - - 0.8 V dc maximum Case operating temperature range (TC)- - - - - - - - - - −55°C to +125°C
Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) - - - - - - XX percent 6/
intended Use:
Microcircuits conforming to this drawing are intended for use for government microcircuit applications (original equipment), design applications, and logistics purposes.
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