NPFC - MIL-M-38510/315
MICROCIRCUITS, DIGITAL, LOW-POWER SCHOTTKY TTL, COUNTERS, MONOLITHIC SILICON
| Organization: | NPFC |
| Publication Date: | 17 January 1984 |
| Status: | inactive |
| Page Count: | 129 |
scope:
This specification covers the detail requirements for monolithic silicon, low-power Schottky TTL, binary and decade counters. Two product assurance classes and a choice of case outline/lead finish are provided for each type and are reflected in the complete part number.
The part number shall be in accordance with MIL-M-38510.
The device type shall be as shown in the following:
Device type Circuit 01 Decade counter 02 4-bit binary counter 03 Synchronous 4-bit decade counter (asynchronous clear) 04 Synchronous 4-bit binary counter (asynchronous clear) 05 Synchronous 4-bit up/down decade counter 06 Synchronous 4-bit up/down binary counter 07 Synchronous 4-bit up/down decade counter (with clear) 08 Synchronous 4-bit up/down binary counter (with clear) 09 Synchronous 4-bit up/down binary counter (with mode control) 10 Divide-by-twelve counter 11 Synchronous 4-bit decade counter (with synchronous clear) 12 Synchronous 4-bit binary counter (with synchronous clear) 13 Synchronous 4-bit decade counter (with mode control)
The device class shall be the product assurance level as defined in MIL-M-38510.
The case outline shall be designated as follows:
Outline letter Case outline (see MIL-M-38510, appendix C) A F-1 (14-lead, ¼" × ¼"), flat package B F-3 (14-lead, 3/16" × ¼"), flat package C D-1 (14-lead, ¼" × ¾"), dual-in-line package D F-2 (14-lead, ¼" × ⅜"), flat package E D-2 (14-lead, ¼" × ⅞"), dual-in-line package F F-5 (16-lead, ¼" × ⅜"), flat package 2 C-2 (20 terminal, .350" × .350"), square chip carrier package
Beneficial comments (recommendations, additions, deletions) and any pertinent data which may be of use in improving this document should be addressed to: Rome Air Development Center RBE-2, Griffiss AFB, NY 13441, by using the self-addressed Standardization Document Improvement Proposal (DD Form 1426) appearing at the end of this document or by letter.
Supply voltage range- - - - - - - - - - −0.5 to 7.0 V dc Input voltage range - - - - - - - - - - 1.2 V dc at −18 mA to 5.5 V dc Storage temperature range - - - - - - - −65°C to 150°C Maximum power dissipation, (PD) 1/ Device types 05, 06, 07, 08 - - - - - 187 mW Device types 01, 02, 10 - - - - - - - 83 mW Device types 03, 04, 11, 12 - - - - - 176 mW Device types 09, 13 - - - - - - - - - 193 mW Lead temperature (soldering, 10 seconds) 300°C Thermal resistance, junction to case case (θJC): Cases A, B, D, F- - - - - - - - - - - 70°C/W Cases C, E- - - - - - - - - - - - - - 50°C/W Case 2- - - - - - - - - - - - - - - - 60°C/W Junction temperature (TJ) - - - - - - - 175°C
Maximum low level output current (IOL)- 4.0 mA Supply voltage- - - - - - - - - - - - - 4.5 V dc minimum to 5.5 V dc maximum Minimum high-level input voltage (VIH)- 2.0 V dc Maximum low-level input voltage (VIL) - 0.7 V dc Normalized fanout (each output) Types 01, 02, 05, 06, 07, 08, 10- - - 10 maximum Types 03, 04, 09, 11, 12, 13- - - - - Low-level - - - - - - - - - - - - - 10 maximum High-level- - - - - - - - - - - - - 20 maximum Width of input count pulse, tp(IN) Types 01, 02, 10 Input A, reset- - - - - - - - - - - 15 ns minimum Input B - - - - - - - - - - - - - - 30 ns minimum Types 07, 08- - - - - - - - - - - - - 20 ns minimum Width of reset pulse, tp(reset) Types 01, 02, 10- - - - - - - - - - - 25 ns minimum Count enable time Type 09, enable - - - - - - - - - - - 40 ns minimum Input clock frequency, fclock Types 01, 02, 10 Input A - - - - - - - - - - - - - - 0 to 29 MHz Types 03, 04, 11, 12- - - - - - - - - 0 to 22 MHz Types 09, 13- - - - - - - - - - - - - 0 to 18 MHz Types 07, 08- - - - - - - - - - - - - 0 to 20 MHz Types 05, 06- - - - - - - - - - - - - 0 to 25 MHz Width of clock pulse tw(clock) Types 03, 04, 09, 11, 12, 13- - - - - 25 ns minimum Types 05, 06- - - - - - - - - - - - - 20 ns minimum Width of clear pulse, tw(clear) Types 03, 04, 05, 06, 07, 08, 11, 12- 20 ns minimum Setup time, t(setup) Types 03, 04, 11, 12 Enable P- - - - - - - - - - - - - - 25 ns minimum Load- - - - - - - - - - - - - - - - 25 ns minimum Clear (types 11 and 12 only)- - - - 20 ns minimum Data inputs Types 03, 04, 09, 11, 12, 13- - - 20 ns minimum Types 07, 08- - - - - - - - - - - 30 ns minimum Types 05, 06 Data, L inputs- - - - - - - - - - - 15 ns minimum PE input- - - - - - - - - - - - - - 20 ns minimum U/D input - - - - - - - - - - - - - 30 ns minimum EP, ET inputs - - - - - - - - - - - 15 ns minimum
Hold time at any input, t(hold) Types 09, 13 - - - - - - - - - - - - 0 ns minimum Types 07, 08 - - - - - - - - - - - - 10 ns minimum Types 05, 06 Data, L, EP, ET inputs - - - - - - 5 ns minimum PE, U/D inputs - - - - - - - - - - 0 ns minimum Types 03, 04, 11, 12 - - - - - - - - 10 ns minimum Types 03, 04, 11, 12 tW (clear)- - - 0 ns minimum Case operating temperature range (TC)- −55°C to +12°C
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